ADV7190KSTZ Analog Devices Inc, ADV7190KSTZ Datasheet - Page 44

• Manufacturer Part Number: ADV7190KSTZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7190KSTZ

• Number Of Dac's: 6
• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

ADV7190/ADV7191
The ADV7190/ADV7191 is a highly integrated circuit contain-
ing both precision analog and high-speed digital circuitry. It
has been designed to minimize interference effects on the integ-
rity of the analog circuitry by the high-speed digital circuitry. It
is imperative that these same design and layout techniques be
applied to the system-level design such that high-speed, accurate
performance is achieved. The Recommended Analog Circuit Lay-
out shows the analog interface between the device and monitor.
The layout should be optimized for lowest noise on the ADV7190/
ADV7191 power and ground lines by shielding the digital inputs
and providing good decoupling. The lead length between groups
of V
mize inductive ringing.
Ground Planes
The ground plane should encompass all ADV7190/ADV7191
ground pins, voltage reference circuitry, power supply bypass cir-
cuitry for the ADV7190/ADV7191, the analog output traces, and
all the digital signal traces leading up to the ADV7190/ADV7191.
Power Planes
The ADV7190/ADV7191 and any associated analog circuitry
should have its own power plane, referred to as the analog power
plane (V
regular PCB power plane (V
ferrite bead. This bead should be located within three inches
of the ADV7190/ADV7191.
The metallization gap separating device power plane and board
power plane should be as narrow as possible to minimize the
obstruction to the flow of heat from the device into the gen-
eral board.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7190/ADV7191 power pins and voltage reference
circuitry.
Plane-to-plane noise coupling can be reduced by ensuring that
portions of the regular PCB power and ground planes do not
overlay portions of the analog power plane, unless they can be
arranged so the plane-to-plane noise is common-mode.
Supply Decoupling
For optimum performance, bypass capacitors should be installed
using the shortest leads possible, consistent with reliable operation,
AA
and AGND pins should by minimized in order to mini-
AA
). This power plane should be connected to the
CC
) at a single point through a
BOARD DESIGN AND LAYOUT CONSIDERATIONS
APPENDIX 1
–44–
to reduce the lead inductance. Best performance is obtained
with 0.1 mF ceramic capacitor decoupling. Each group of V
pins on the ADV7190/ADV7191 must have at least one 0.1 mF
decoupling capacitor to AGND. These capacitors should be placed
as close as possible to the device.
It is important to note that while the ADV7190/ADV7191
contains circuitry to reject power supply noise, this rejection
decreases with frequency. If a high-frequency switching power
supply is used, the designer should pay close attention to reducing
power supply noise and consider using a three-terminal voltage
regulator for supplying power to the analog power plane.
Digital Signal Interconnect
The digital inputs to the ADV7190/ADV7191 should be isolated
as much as possible from the analog outputs and other analog
circuitry. Also, these input signals should not overlay the
analog power plane.
Due to the high clock rates involved, long clock lines to the
ADV7190/ADV7191 should be avoided to reduce noise pickup.
Any active termination resistors for the digital inputs should be
connected to the regular PCB power plane (V
analog power plane.
Analog Signal Interconnect
The ADV7190/ADV7191 should be located as close as possible
to the output connectors to minimize noise pickup and reflec-
tions due to impedance mismatch.
The video output signals should overlay the ground plane, and
not the analog power plane, to maximize the high frequency power
supply rejection.
Digital inputs, especially pixel data inputs and clocking signals
should never overlay any of the analog signal circuitry and should
be kept as far away as possible.
For best performance, the outputs should each have a 300 W load
resistor connected to AGND. These resistors should be placed
as close as possible to the ADV7190/ADV7191 so as to mini-
mize reflections.
The ADV7190/ADV7191 should have no inputs left floating.
Any inputs that are not required should be tied to ground.
CC
), and not the
REV. B
AA