TMC22053KHC Fairchild Semiconductor, TMC22053KHC Datasheet - Page 72

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TMC22053KHC

Manufacturer Part Number
TMC22053KHC
Description
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of TMC22053KHC

Screening Level
Commercial
Package Type
MQFP
Pin Count
100
Lead Free Status / RoHS Status
Compliant
TMC22x5y
Operating Conditions
Notes:
1. Tested at f
To aid in the understanding of the timing relationship between the PXCK and LDV clock, when the LDV signal is used as the
TMC22x5y output clock, the following block diagram of the TMC22x5y output stage is provided.
72
Parameter
V
V
V
I
I
T
Pixel Interface (input)
f
t
t
t
t
t
t
OH
OL
CLK
PWHCK
PWLCK
SP
HP
SP
HP
A
DD
IH
IL
CLK
Power Supply Voltage
Input Voltage, Logic HIGH
Input Voltage, Logic LOW
Output Current, Logic HIGH
Output Current, Logic LOW
Ambient Temperature, Still Air
Pixel Rate (CKSEL = 0)
Master Clock Rate = 2X pixel rate (CKSEL = 1)
CLOCK pulse width, HIGH
CLOCK pulse width, LOW
Pixel Data Input Setup Time
Pixel Data Input Hold Time
HSYNC, VSYNC, and BUFFER setup time
HSYNC, VSYNC, and BUFFER hold time
Figure 41. Functional Block Diagram of the TMC22x5y G/Y, B/U, and R/V Output Stage
= 30MHz
Data In
PXCK
LDV
TTL Compatible Inputs
Serial Port (SDA and SCL)
TTL Compatible Inputs
Serial Port (SDA and SCL)
D
Ck
mux
Q
2:1
1
D
Ck
Q
0.7*V
GND
GND
Min.
4.75
2.0
10
20
13
0
8
8
2
5
6
DD
65-22x5y-78
G/Y, B/U, and R/V
Output Data
Nom.
5.0
PRODUCT SPECIFICATION
0.3*V
Max.
5.25
V
-2.0
0.8
4.0
18
36
70
DD
DD
Units
MHz
MHz
mA
mA
°C
ns
ns
ns
ns
ns
ns
V
V
V
V
V

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