SAA7104HV1 NXP Semiconductors, SAA7104HV1 Datasheet - Page 11

• Manufacturer Part Number: SAA7104HV1
• Manufacturer: NXP Semiconductors

Specifications of SAA7104HV1

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: PQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
Table 2 Layout of a byte in the cursor bit map
For each direction, there are 2 registers controlling the
position of the cursor, one controls the position of the
‘hot spot’, the other register controls the insertion position.
The hot spot is the ‘tip’ of the pointer arrow. It can have any
position in the bit map. The actual position registers
describe the co-ordinates of the hot spot. Again 0,0 is the
upper left corner. While it is not possible to move the
hot spot beyond the left respectively upper screen border
this is perfectly legal for the right respectively lower border.
It should be noted that the cursor position is described
relative to the input resolution.
Table 3 Cursor bit map
2004 Mar 04
pixel n + 3
D1
0
1
2
...
6
7
...
254
255
BYTE
D7
Digital video encoder
D0
D6
row 0
column 3
row 0
column 7
row 0
column
11
...
row 0
column
27
row 0
column
31
...
row 31
column
27
row 31
column
31
D7
pixel n + 2
D1
D5
D6
D0
row 0
column 2
row 0
column 6
row 0
column
10
...
row 0
column
26
row 0
column
30
...
row 31
column
26
row 31
column
30
D5
D4
D4
pixel n + 1
D1
D3
row 0
column 1
row 0
column 5
row 0
column 9
...
row 0
column
25
row 0
column
29
...
row 31
column
25
row 31
column
29
D3
D0
D2
D2
pixel n
D1
D1
row 0
column 0
row 0
column 4
row 0
column 8
...
row 0
column
24
row 0
column
28
...
row 31
column
24
row 31
column
28
D1
D0
D0
D0
11
Table 4 Cursor modes
7.5
RGB input signals to be encoded to PAL or NTSC are
converted to the Y-C
colour difference signals are fed through low-pass filters
and formatted to a ITU-R BT.601 like 4 : 2 : 2 data stream
for further processing.
A gain adjust option corrects the level swing of the
graphics world (black-to-white as 0 to 255) to the required
range of 16 to 235.
The matrix and formatting blocks can be bypassed for
Y-C
When the auxiliary VGA mode is selected, the output of the
cursor insertion block is immediately directed to the triple
DAC.
7.6
The high quality horizontal scaler operates on the 4 : 2 : 2
data stream. Its control engines compensate the colour
phase offset automatically.
The scaler starts processing after a programmable
horizontal offset and continues with a number of input
pixels. Each input pixel is a programmable fraction of the
current output pixel (XINC/4096). A special case is
XINC = 0, this sets the scaling factor to 1.
If the SAA7104H; SAA7105H input data is in accordance
with “ITU-R BT.656” , the scaler enters another mode.
In this event, XINC needs to be set to 2048 for a scaling
factor of 1. With higher values, upscaling will occur.
The phase resolution of the circuit is 12 bits, giving a
maximum offset of 0.2 after 800 input pixels. Small FIFOs
rearrange a 4 : 2 : 2 data stream at the scaler output.
00
01
10
11
PATTERN
CURSOR
B
-C
RGB Y-C
Horizontal scaler
R
graphics input.
second cursor colour second cursor colour
first cursor colour
transparent
inverted input
B
CMODE = 0
-C
SAA7104H; SAA7105H
R
B
-C
matrix
R
colour space in this block. The
CURSOR MODE
first cursor colour
transparent
auxiliary cursor
colour
Product specification
CMODE = 1