SAA7120H/V2,557 NXP Semiconductors, SAA7120H/V2,557 Datasheet - Page 9

SAA7120H/V2,557

Manufacturer Part Number
SAA7120H/V2,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7120H/V2,557

Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
PQFP
Pin Count
44
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
7.5
The I
supporting 7-bit slave addresses and 400 kbits/s
guaranteed transfer rate. It uses 8-bit subaddressing with
an auto-increment function. All registers are write only,
except one readable status byte.
The I
(SA) tied LOW and as 8CH with pin 21 (SA) tied HIGH.
7.6
The SAA7120H; SAA7121H expects digital Y, C
and C
with “CCIR 601” .
For C and CVBS outputs, deviating amplitudes of the
colour difference signals can be compensated by
independent gain control setting, while gain for luminance
is set to predefined values, distinguishable for 7.5 IRE
set-up or without set-up.
Table 2 8-bit multiplexed format (similar to “CCIR 601” )
2002 Oct 11
Sample
Luminance pixel number
Colour pixel number
Digital video encoder
2
2
C-bus interface is a standard slave transceiver,
C-bus slave address is defined as 88H with pin 21
R
I
Input levels and formats
2
data with levels (digital codes) in accordance
C-bus interface
TIME
C
0
B
0
0
Y0
1
B
0
C
2
R
0
9
1
Reference levels are measured with a colour bar,
100% white, 100% amplitude and 100% saturation.
Table 1 “CCIR 601” signal component levels
White
Yellow
Cyan
Green
Magenta
Red
Blue
Black
COLOUR
Y1
3
BITS
C
4
B
2
SAA7120H; SAA7121H
235
210
170
145
106
81
41
16
Y
2
Y2
5
SIGNALS
2
128
166
202
240
128
C
16
54
90
B
Product specification
C
6
R
2
3
128
146
222
240
110
128
C
16
34
Y3
R
7

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