UDA1344TS/N2,112 NXP Semiconductors, UDA1344TS/N2,112 Datasheet - Page 14

UDA1344TS/N2,112

Manufacturer Part Number
UDA1344TS/N2,112
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UDA1344TS/N2,112

Single Supply Voltage (typ)
3V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
3.6V
Package Type
SSOP
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
S
A 2-bit value to select the used external clock frequency.
Table 16 System clock frequency settings
D
A 3-bit value to select the used data format.
Table 17 Data format settings
DC
A 1-bit value to enable the digital DC filter.
Table 18 DC filtering
2001 Jun 29
YSTEM CLOCK FREQUENCY
ATA INPUT FORMAT
Low-voltage low-power stereo audio
CODEC with DSP features
IF2
FILTER
0
0
0
0
1
1
1
1
SC1
0
0
1
1
DC
IF1
0
0
1
1
0
0
1
1
0
1
SC0
0
1
0
1
IF0
0
1
0
1
0
1
0
1
512f
384f
256f
not used
I
LSB-justified 16 bits
LSB-justified 18 bits
LSB-justified 20 bits
MSB-justified
input: LSB-justified 16 bits;
output: MSB-justified
input: LSB-justified 18 bits;
output: MSB-justified
input: LSB-justified 20 bits;
output: MSB-justified
no DC filtering
DC filtering
2
S-bus
s
s
s
SELECTION
SELECTION
FORMAT
14
V
A 6-bit value to program the left and right channel volume
attenuation. The range is from 0 to −∞ dB in steps of 1 dB.
Table 19 Volume settings
B
A 4-bit value to program the bass boost setting. The used
set depends on the mode bits M1 and M0.
Table 20 Bass boost settings
VC5 VC4 VC3 VC2 VC1 VC0
BB3 BB2 BB1 BB0
OLUME CONTROL
ASS BOOST
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
:
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
:
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
:
0
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
:
FLAT
0
0
1
1
1
0
0
1
1
:
(dB)
BASS BOOST SETTING
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
0
1
0
1
:
UDA1344TS
Product specification
MIN.
(dB)
10
12
14
16
18
18
18
18
18
18
18
0
2
4
6
8
VOLUME (dB)
−58
−59
−60
−∞
−∞
−1
−2
0
0
:
MAX.
(dB)
10
12
14
16
18
20
22
24
24
24
24
0
2
4
6
8

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