UCB1400BE128 NXP Semiconductors, UCB1400BE128 Datasheet - Page 20
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UCB1400BE128
Manufacturer Part Number
UCB1400BE128
Description
Manufacturer
NXP Semiconductors
Datasheet
1.UCB1400BE128.pdf
(64 pages)
Specifications of UCB1400BE128
Single Supply Voltage (typ)
3.3V
Single Supply Voltage (min)
3V
Single Supply Voltage (max)
3.6V
Package Type
LQFP
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
9397 750 09611
Product data
The interrupt generation mode is set by the Positive INT Enable Register (0x5E) and
Negative INT Enable Register (0x60). The actual interrupt status of each signal can
be read from the INT Clear/Status Register (0x62). The interrupt status is cleared
whenever a ‘1’ is written in the INT Clear/Status Register (0x62) for the corresponding
bit.
The interrupt controller is implemented asynchronously. This provides the possibility
to generate interrupts when the BIT_CLK is stopped, e.g., an interrupt can be
generated in power-down mode when the touch screen is pressed or when the state
of one of the IO pins changes.
The IRQOUT pin presents the ‘OR’ function of all interrupt status bits and can be
used to give an interrupt to the system controller.
When the GIEN bit of the Feature Control/Status Register 1 (0x6A) is set, the
IRQOUT signal is communicated to the AC Link by means of:
•
•
GPIO_INT bit of input slot 12 when BIT_CLK is on.
Rising SDATA_IN when BIT_CLK is off.
Rev. 02 — 21 June 2002
Audio codec with touch screen controller
and power management monitor
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
UCB1400
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