MC33911G5ACR2 Freescale, MC33911G5ACR2 Datasheet - Page 39

• Manufacturer Part Number: MC33911G5ACR2
• Manufacturer: Freescale

Specifications of MC33911G5ACR2

• Turn Off Delay Time: 10us
• Number Of Drivers: 2
• Operating Temperature (min): -40C
• Operating Temperature (max): 125C
• Operating Temperature Classification: Automotive
• Lead Free Status / RoHS Status: Compliant

Table 8. System Status Register
Table 9. SPI Register Overview
Analog Integrated Circuit Device Data
Freescale Semiconductor
Adress(A3:A0)
Adress(A3:A0)
Table 9
$0 - $F
$C
$D
$0
$1
$2
$3
$4
$5
$6
$7
$8
$9
$A
$B
$E
$F
summarizes the SPI Register content for Control Information (C3:C0)=W and status information (S3:S0) = R.
AMUXCR - Analog Multiplexer Control Register
Register Name / Read / Write Information
Register Name / Read / Write Information
WUCR - Wake-up Control Register
HSCR - High Side Control Register
WDSR - Watchdog Status Register
WDSR - Watchdog Status Register
LSCR - Low Side Control Register
WUSR - Wake-up Status Register
WUSR - Wake-up Status Register
HSSR - High Side Status Register
HSSR - High Side Status Register
SYSSR - System Status Register
LSSR - Low Side Status Register
LSSR - Low Side Status Register
TIMCR - Timing Control Register
ISR - Interrupt Source Register
ISR - Interrupt Source Register
VSR - Voltage Status Register
VSR - Voltage Status Register
MCR - Mode Control Register
IMR - Interrupt Mask Register
LINCR - LIN Control Register
CFR - Configuration Register
LINSR - LIN Status Register
LINSR - LIN Status Register
SPI REGISTER OVERVIEW
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
DIS_J2602
RXSHORT
RXSHORT
PWMLS2
CS/WD
LS2OP
LS2OP
WDTO
WDTO
HVSE
VSOV
VSOV
LXDS
HSM
ISR3
ISR3
VMS
7
3
0
0
0
-
-
-
-
PWMHS1
RXONLY
PWMLS1
TXDOM
TXDOM
WDERR
WDERR
CYST2
CYSX8
LS2CL
LS2CL
VSUV
VSUV
LINS
WD2
ISR2
ISR2
MX2
LSM
6
2
0
0
-
-
-
-
BIT
BIT
LOGIC COMMANDS AND REGISTERS
FUNCTIONAL DEVICE OPERATIONS
WDOFF
WDOFF
VDDOT
VDDOT
HS1OP
HS1OP
LS1OP
LS1OP
CYST1
LINOT
LINOT
MOD2
L2WE
LSR1
LINM
WD1
ISR1
ISR1
HSS
MX1
LS2
L2
L2
5
1
0
0
BATFAIL
BATFAIL
WDWO
WDWO
HS1CL
HS1CL
CYST0
LS1CL
LS1CL
MOD1
L1WE
LSR0
WD0
VMM
ISR0
ISR0
MX0
LSS
HS1
LS1
L1
L1
4
0
0
0
0
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