XC4VLX40-10FFG668I Xilinx Inc, XC4VLX40-10FFG668I Datasheet - Page 52
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XC4VLX40-10FFG668I
Manufacturer Part Number
XC4VLX40-10FFG668I
Description
FPGA Virtex®-4 Family 41472 Cells 90nm (CMOS) Technology 1.2V 668-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r
Specifications of XC4VLX40-10FFG668I
Package
668FCBGA
Family Name
Virtex®-4
Device Logic Units
41472
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
448
Ram Bits
1769472
Number Of Logic Elements/cells
41472
Number Of Labs/clbs
4608
Total Ram Bits
1769472
Number Of I /o
448
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
668-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-AFX-FF668-400 - BOARD DEV VIRTEX 4 FF668
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC4VLX40-10FFG668I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Current Virtex-4 Production Devices
Table 64
Table 64: Current LX and SX Production Devices
Table 65
Table 65: Current FX Production Devices
DS302 (v3.7) September 9, 2009
Product Specification
Notes:
1.
Notes:
1.
Example Ordering Code
Device steppings shipped when
ordered per
Code
Capability Improvements
CONFIG STEPPING parameter
(must be set in UCF file)
Minimum Software Required
Minimum Speed Specification
Required.
Example Ordering Code
Device steppings shipped when
ordered per
Code
Capability Improvements
CONFIG STEPPING parameter
(must be set in UCF file)
Minimum Software Required
Minimum Speed Specification
Required
See LX and SX Errata for details on LX and SX Step 1 and ES silicon.
Speed Specification v1.65 or later must be used for XC4VFX40 devices (all speed grades) and for XC4VFX100 (-12 speed grade only). In this case,
these family members (and speed grades) are released to production before a speed specification is released with the correct label (Advance,
Preliminary, or Production). These labeling discrepancies will be corrected in a subsequent speed specification release.
LX/SX Device Stepping
FX Device Stepping
summarizes the current production LX and SX device stepping.
summarizes the current production FX device stepping.
Example Ordering
Example Ordering
(1)
•
XC4VLX60-10FF672C
Step 1 or Step 2
“1”
ISE 7.1i SP4
1.58
XC4VFX60-10FF1152C
Step 0 or Step 1
“0”
ISE 8.1i SP2
1.58
The DFS macro is no
longer needed
Step 1
Step 0
www.xilinx.com
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
•
•
•
XC4VLX60-10FF672CS2
“2”
ISE 7.1i SP4
1.58
Step 2
XC4VFX60-10FF1152CS1
Step 1
See FX Errata for details
“0” or “1”
ISE 8.1i SP2
1.58
DCM_RESET requirement is removed
DCM_INPUT_CLOCK_STOP requirement is
removed by a macro (automatically inserted by ISE
software)
T
CONFIG
requirement is removed
Step 2
Step 1
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