AD9912BCPZ Analog Devices Inc, AD9912BCPZ Datasheet - Page 12

• Manufacturer Part Number: AD9912BCPZ
• Manufacturer: Analog Devices Inc

Specifications of AD9912BCPZ

• Lead Free Status / RoHS Status: Compliant

AD9912
–110
–120
–130
–140
–150
–160
–100
–110
–120
–130
–140
–150
–110
–120
–130
–140
–150
–160
Figure 16. Absolute Phase Noise Using CMOS Driver at 3.3 V,
Figure 17. Absolute Phase Noise Using CMOS Driver at 1.8 V,
SYSCLK = 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed),
SYSCLK = 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
SYSCLK = 1 GHz Wenzel Oscillator (SYSCLK PLL Bypassed)
100
100
100
Figure 15. Absolute Phase Noise Using HSTL Driver,
DDS Run at 200 MSPS for 10 MHz Plot
1k
1k
1k
HSTL Output Doubler Enabled
FREQUENCY OFFSET (Hz)
FREQUENCY OFFSET (Hz)
FREQUENCY OFFSET (Hz)
10k
10k
10k
800MHz
RMS JITTER (100Hz TO 20MHz):
150MHz:
50MHz:
RMS JITTER (100Hz TO 100MHz):
600MHz:
800MHz:
RMS JITTER (100Hz TO 20MHz):
50MHz:
100k
100k
100k
600MHz
308fs
737fs
585fs
406fs
790fs
1M
1M
1M
50MHz
50MHz
10MHz
10M
10M
10M
10MHz
150MHz
100M
100M
100M
Rev. D | Page 12 of 40
(SYSCLK PLL Bypassed), f
–100
800
700
600
500
400
300
200
100
800
700
600
500
400
300
200
100
–10
–20
–30
–40
–50
–60
–70
–80
–90
10
0
0
250
Figure 20. SFDR Comparison With and Without SpurKiller,
0
Figure 18. Power Dissipation vs. System Clock Frequency
SYSCLK = 1 GHz (SYSCLK PLL Bypassed), HSTL Driver On,
0
0
CARRIER:
SFDR W/O SPURKILLER:
SFDR WITH SPURKILLER:
FREQUENCY SPAN:
RESOLUTION BW:
VIDEO BW:
Figure 19. Power Dissipation vs. Output Frequency
TOTAL
3.3V
1.8V
375
100
SYSTEM CLOCK FREQUENCY (MHz)
SYSCLK = 1 GHz, f
CMOS Driver On, SpurKiller Off
100
THESE TWO SPURS
ELIMINATED WITH
OUTPUT FREQUENCY (MHz)
OUT
SPURKILLER
500
= f
FREQUENCY (MHz)
SpurKiller Off
200
SYSCLK
200
625
399MHz
–63.7dBc
–69.3dBc
500MHz
3kHz
30kHz
/5, HSTL Driver On, CMOS Driver On,
OUT
= 400 MHz
300
750
300
400
875
TOTAL
3.3V
1.8V
1000
400
500