M36W0R6050B0ZAQE STMicroelectronics, M36W0R6050B0ZAQE Datasheet

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Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 32 Mbit (2Mb x16) PSRAM, Multi-Chip Package FEATURES SUMMARY MULTI-CHIP PACKAGE – 1 die of 64 Mbit (4Mb x 16) Flash Memory – 1 die of 32 Mbit (2Mb x ...

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M36W0R6050T0, M36W0R6050B0 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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DC AND AC PARAMETERS ...

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M36W0R6050T0, M36W0R6050B0 SUMMARY DESCRIPTION The M36W0R6050T0 and M36W0R6050B0 com- bine two memory devices in a Multi-Chip Package: a 64-Mbit, Multiple Bank Flash memory, the M58WR064FT/B, and a 32-Mbit Pseudo SRAM, the M69AR048B. Recommended operating condi- tions do not allow more ...

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Figure 3. TFBGA Connections (Top view through package A18 A17 DQ8 DQ0 ...

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M36W0R6050T0, M36W0R6050B0 SIGNAL DESCRIPTIONS See Figure 2., Logic Diagram and Names, for a brief overview of the signals connect this device. Address Inputs (A0-A20). Addresses are common inputs for the Flash Memory and PSRAM components. The Address Inputs ...

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PSRAM Output Enable (G ). The Output En- P able provides a high speed tri-state control, P allowing fast read/write cycles to be achieved with the common I/O data bus. PSRAM Write Enable (W ). The Write Enable, ...

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M36W0R6050T0, M36W0R6050B0 FUNCTIONAL DESCRIPTION The Flash memory and PSRAM components have separate power supplies but share the same grounds. They are distinguished by three Chip En- able inputs: E for the Flash memory and for the PSRAM. ...

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Table 2. Main Operating Modes Operation Flash Read Flash Write Flash Address Latch Flash Output V V ...

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... STMicroelectronics distributor. plied. Exposure to Absolute Maximum Rating con- ditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality docu- ments. Parameter at V PPH ...

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DC AND AC PARAMETERS This section summarizes the operating measure- ment conditions, and the DC and AC characteris- tics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the ...

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M36W0R6050T0, M36W0R6050B0 Table 6. Flash Memory DC Characteristics - Currents Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO Supply Current Asynchronous Read (f=6MHz) Supply Current Synchronous Read (f=54MHz) I DD1 Supply Current Synchronous Read (f=66MHz) I ...

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Table 7. Flash Memory DC Characteristics - Voltages Symbol Parameter V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage Program Voltage-Logic PP1 PPF V V Program Voltage ...

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M36W0R6050T0, M36W0R6050B0 PACKAGE MECHANICAL Figure 7. Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch, Package Outline BALL "A1" FE Note: Drawing is not to scale. Table 9. Stacked TFBGA88 8x10mm - 8x10 ball array, 0.8mm ...

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PART NUMBERING Table 10. Ordering Information Scheme Example: Device Type M36 = Multi-Chip Package (Multiple Flash + RAM) Flash 1 Architecture W = Multiple Bank, Burst mode Flash 2 Architecture 0 = none present Operating Voltage ...

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M36W0R6050T0, M36W0R6050B0 REVISION HISTORY Table 11. Document Revision History Date Version 26-Mar-2004 0.1 First Issue TFBGA88 package fully compliant with the ST ECOPACK specification. 07-Dec-2004 1.0 Document status promoted from Product Preview to full Datasheet. Flash memory data updated to ...

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... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...