CY7C4245V-25ASC Cypress Semiconductor Corp, CY7C4245V-25ASC Datasheet - Page 12

CY7C4245V-25ASC

Manufacturer Part Number
CY7C4245V-25ASC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C4245V-25ASC

Configuration
Dual
Density
64Kb
Access Time (max)
15ns
Word Size
18b
Organization
4Kx18
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
TQFP
Clock Freq (max)
40MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Supply Current
30mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant
Switching Characteristics
Switching Waveforms
Note
Document #: 38-06029 Rev. *D
t
t
t
t
t
t
14. t
XO
XI
XIS
SKEW1
SKEW2
SKEW3
Parameter
the rising edge of RCLK and the rising edge of WCLK is less than t
SKEW1
D
0
WCLK
RCLK
–D
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that FF will go HIGH during the current clock cycle. If the time between
WEN
REN
17
FF
Clock to Expansion Out
Expansion in Pulse Width
Expansion in Set-up Time
Skew Time between Read Clock and Write Clock for
Full Flag
Skew Time between Read Clock and Write Clock for
Empty Flag
Skew Time between Read Clock and Write Clock for
Programmable Almost Empty and Programmable
Almost Full Flags.
t
SKEW1
Description
Over the Operating Range (continued)
t
[14]
CLKH
t
WFF
Figure 5. Write Cycle Timing
t
CLK
SKEW1
t
DS
, then FF may not change state until the next WCLK edge.
t
CLKL
t
ENS
7C42X5V-15
Min
6.5
15
5
6
6
t
DH
t
ENH
Max
10
t
WFF
7C42X5V-25
Min
10
10
10
10
18
NO OPERATION
Max
15
CY7C4225V/4215V
CY7C4235V/4245V
7C42X5V-35
Min
14
15
12
12
20
Max
20
Page 12 of 23
Unit
ns
ns
ns
ns
ns
ns
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