M25P32-VMW3TGB NUMONYX, M25P32-VMW3TGB Datasheet - Page 32

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M25P32-VMW3TGB

Manufacturer Part Number
M25P32-VMW3TGB
Description
Manufacturer
NUMONYX
Datasheet

Specifications of M25P32-VMW3TGB

Cell Type
NOR
Density
32Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 125C
Package Type
SO W
Sync/async
Synchronous
Operating Temperature Classification
Automotive
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
8mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M25P32-VMW3TGB
Manufacturer:
MICREL
Quantity:
1 200
Part Number:
M25P32-VMW3TGB
Manufacturer:
MICRON/美光
Quantity:
20 000
6.10
32/54
Bulk Erase (BE)
The Bulk Erase (BE) instruction sets all bits to 1 (FFh). Before it can be accepted, a Write
Enable (WREN) instruction must previously have been executed. After the Write Enable
(WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL).
The Bulk Erase (BE) instruction is entered by driving Chip Select (S) Low, followed by the
instruction code on Serial Data Input (D). Chip Select (S) must be driven Low for the entire
duration of the sequence.
The instruction sequence is shown in
Chip Select (S) must be driven High after the eighth bit of the instruction code has been
latched in, otherwise the Bulk Erase instruction is not executed. As soon as Chip Select (S)
is driven High, the self-timed Bulk Erase cycle (whose duration is t
Bulk Erase cycle is in progress, the Status Register may be read to check the value of the
Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1 during the self-timed Bulk
Erase cycle, and is 0 when it is completed. At some unspecified time before the cycle is
completed, the Write Enable Latch (WEL) bit is reset.
The Bulk Erase (BE) instruction is executed only if all Block Protect (BP2, BP1, BP0) bits
are 0. The Bulk Erase (BE) instruction is ignored if one, or more, sectors are protected.
Figure 17. Bulk Erase (BE) instruction sequence
S
C
D
Figure
0
1
2
17.
Instruction
3
4
5
6
7
BE
AI03752D
) is initiated. While the

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