M25PE80-VMW6G NUMONYX, M25PE80-VMW6G Datasheet - Page 8

• Manufacturer Part Number: M25PE80-VMW6G
• Manufacturer: NUMONYX

Specifications of M25PE80-VMW6G

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 8ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC W
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1M
• Supply Current: 8mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Compliant

Signal descriptions
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Signal descriptions
Serial data output (Q)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of serial clock (C).
Serial data input (D)
This input signal is used to transfer data serially into the device. It receives instructions,
addresses, and the data to be programmed. Values are latched on the rising edge of serial
clock (C).
Serial clock (C)
This input signal provides the timing of the serial interface. Instructions, addresses, or data
present at serial data input (D) are latched on the rising edge of serial clock (C). Data on
serial data output (Q) changes after the falling edge of serial clock (C).
Chip select (S)
When this input signal is High, the device is deselected and serial data output (Q) is at high
impedance. Unless an internal read, program, erase or write cycle is in progress, the device
will be in the standby mode (this is not the deep power-down mode). Driving Chip Select (S)
Low selects the device, placing it in the active power mode.
After power-up, a falling edge on Chip Select (S) is required prior to the start of any
instruction.
Reset (Reset)
The reset (Reset) input provides a hardware reset for the memory.
When reset (Reset) is driven High, the memory is in the normal operating mode. When reset
(Reset) is driven Low, the memory will enter the reset mode. In this mode, the output is high
impedance.
Driving reset (Reset) Low while an internal operation is in progress will affect this operation
(write, program or erase cycle) and data may be lost.
M25PE80