M25PE80-VMN6P NUMONYX, M25PE80-VMN6P Datasheet - Page 54

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M25PE80-VMN6P

Manufacturer Part Number
M25PE80-VMN6P
Description
Flash Mem Serial-SPI 3.3V 8M-Bit 1M x 8 8ns 8-Pin SOIC N Tray
Manufacturer
NUMONYX
Datasheet

Specifications of M25PE80-VMN6P

Package
8SOIC N
Cell Type
NOR
Density
8 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
256Byte x 4096
Timing Type
Synchronous
Operating Temperature
-40 to 85 °C
Interface Type
Serial-SPI
Lead Free Status / RoHS Status
Compliant
DC and AC parameters
Table 24.
1. See
2. t
3. Value guaranteed by characterization, not 100% tested in production.
4. Only applicable as a constraint for a WRSR instruction when SRWD is set to ‘1’.
5. When using PP and PW instructions to update consecutive bytes, optimized timings are obtained with one sequence
6.
54/66
Symbol
t
t
t
WHSL
SHWL
SHQZ
t
t
t
t
t
t
t
t
t
t
t
t
t
RDP
t
t
CHDX
CHSH
SHCH
PW
CH
SLCH
CHSL
DVCH
CLQV
CLQX
t
CL
SHSL
DP
PP
including all the bytes versus several sequences of only a few bytes (1 ≤ n ≤ 256).
t
t
SSE
t
t
CH
int(A) corresponds to the upper integer part of A. For instance, int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
f
f
PE
SE
BE
W
C
R
(2)
(3)
(2)
(3)
(5)
(3)
(3)
(4)
(4)
+ t
Important note on page
CL
must be greater than or equal to 1/ f
t
t
t
t
t
Alt.
t
t
t
CLH
CSS
DSU
CSH
CLL
DIS
f
DH
HO
t
AC characteristics (75 MHz operation, T9HX (0.11
C
V
Clock frequency for the following instructions:
FAST_READ, RDLR, PW, PP, WRLR, PE, SE,
SSE, DP, RDP, WREN, WRDI, RDSR, WRSR
Clock frequency for read instructions
Clock high time
Clock low time
Clock slew rate
S active setup time (relative to C)
S not active hold time (relative to C)
Data in setup time
Data in hold time
S active hold time (relative to C)
S not active setup time (relative to C)
S deselect time
Output disable time
Clock low to output valid under 30 pF/10 pF
Output hold time
Write protect setup time
Write protect hold time
S to deep power-down
S high to standby mode
Write status register cycle time
Page write cycle time (256 bytes)
Page program cycle time (256 bytes)
Page program cycle time (n bytes)
Page erase cycle time
Sector erase cycle time
Subsector erase cycle time
Bulk erase cycle time
6.
Test conditions specified in
(2)
(peak to peak)
Parameter
C
.
Table 17
and
D.C.
D.C.
Min
100
100
0.1
20
µm) process
6
6
5
5
2
5
5
5
0
Table 18
int(n/8) × 0.025
(1)
Typ
0.8
11
10
50
10
3
1
)
(6)
Max
150
8/6
75
33
30
15
23
20
20
8
3
3
5
M25PE80
MHz
MHz
V/ns
Unit
ms
ms
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
s
s

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