M391T2953EZ3-CE6 Samsung Semiconductor, M391T2953EZ3-CE6 Datasheet

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M391T2953EZ3-CE6

Manufacturer Part Number
M391T2953EZ3-CE6
Description
Manufacturer
Samsung Semiconductor
Datasheet

Specifications of M391T2953EZ3-CE6

Lead Free Status / RoHS Status
Compliant
UDIMM
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE
CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER-
WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL-
OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT
GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
* Samsung Electronics reserves the right to change products or specification without notice.
applications where Product failure could result in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
240pin Unbuffered Module based on 512Mb E-die
DDR2 Unbuffered SDRAM MODULE
60FBGA & 84FBGA with Lead-Free
64/72-bit Non-ECC/ECC
(RoHS compliant)
1 of 27
Rev. 1.3 July 2008
DDR2 SDRAM

Related parts for M391T2953EZ3-CE6

M391T2953EZ3-CE6 Summary of contents

Page 1

... UDIMM DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb E-die 60FBGA & 84FBGA with Lead-Free INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER- WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL- OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...

Page 2

... Timing parameters by speed grade (DDR2-533 and DDR2-400) 15.0 Physical Dimensions : ..............................................................................................................24 15.1 64Mbx8 based 64Mx64 Module (1 Rank) - M378T6553EZS 15.2 64Mbx8 based 64Mx72 Module (1 Rank) - M391T6553EZ3 15.3 64Mbx8 based 128Mx64/x72 Module (2 Ranks) - M378T2953EZ3, M391T2953EZ3 15.4 32Mbx16 based 32Mx64 Module (1 Rank) - M378T3354EZ3 .........................................................................................8 ..................................................................................9 .........................................................................................10 ...

Page 3

UDIMM Revision History Revision Month Year 0.1 March 2006 1.0 September 2006 1.1 September 2006 1.2 June 2007 1.3 July 2008 - Initial Release - Revised the IDD values - Added DDR2-800 CL=6 - Changed the Feature - Corrected Typo ...

Page 4

... DDR2 Unbuffered DIMM Ordering Information Part Number Density M378T3354EZ3-CE7/F7/E6/D5/CC M378T6553EZS-CE7/F7/E6/D5/CC M378T2953EZ3-CE7/F7/E6/D5/CC M391T6553EZ3-CE7/F7/E6/D5/CC M391T2953EZ3-CE7/F7/E6/D5/CC Note : 1. “Z” of Part number(11th digit) stands for Lead-Free products. 2. “3” of Part number(12th digit) stands for Dummy Pad PCB products. 2.0 Features • Performance range E7 (DDR2-800) ...

Page 5

... DQ22 DQ18 150 DQ23 Connect, RFU = Reserved for Future Use 1. Pin196(A13) is used for x8 base Unbuffered DIMM. 2. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs.) Front Pin Back Pin Front V DQ19 151 61 A4 ...

Page 6

... DQ23 Connect, RFU = Reserved for Future Use 1. Pin196(A13) is used for x8 base Unbuffered DIMM. 2. The TEST pin is reserved for bus analysis tools and is not connected on standard memory module products (DIMMs.) 6.0 Pin Description Pin Name Description A0-A13 DDR2 SDRAM address bus ...

Page 7

... Power and ground for DDR2 SDRAM input buffers, and core logic Supply DD SS these modules. DQS0-DQS8 Data strobe for input and output data. For Rawcards using x16 orginized DRAMs DQ0-7 connect to the LDQS pin of the In/Out DQS0-DQS8 DRAMs and DQ8-17 connect to the UDQS pin of the DRAM ...

Page 8

... UDIMM 8.0 Functional Block Diagram : 8.1 512MB, 64Mx64 Module - M378T6553EZS (Populated as 1 rank of x8 DDR2 SDRAMs) S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 D0 I/O 1 DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 ...

Page 9

... UDIMM 8.2 512MB, 64Mx72 ECC Module - M391T6553EZ3 (Populated as 1 rank of x8 DDR2 SDRAMs) S0 DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 ...

Page 10

... UDIMM 8.3 1GB, 128Mx64 Module - M378T2953EZ3 (Populated as 2 ranks of x8 DDR2 SDRAMs DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 I/O 0 ...

Page 11

... UDIMM 8.4 1GB, 128Mx72 ECC Module - M391T2953EZ3 (Populated as 2 ranks of x8 DDR2 SDRAMs DQS0 DQS0 DM0 DM CS DQS DQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1 DM CS DQS DQS DQ8 ...

Page 12

... UDIMM 8.5 256MB, 32Mx64 Module - M378T3354EZ3 (Populated as 1 rank of x16 DDR2 SDRAMs) DQS1 DQS1 DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS0 DQS0 DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS3 DQS3 DM3 DQ24 DQ25 DQ26 DQ27 ...

Page 13

UDIMM 9.0 Absolute Maximum DC Ratings Symbol Parameter Voltage on V pin relative Voltage on V pin relative DDQ DDQ Voltage on V pin relative DDL DDL Voltage on ...

Page 14

UDIMM 10.2 Operating Temperature Condition Symbol T Operating Temperature OPER Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard ...

Page 15

UDIMM 11.0 IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Operating one bank active-precharge current; IDD0 tCK = tCK(IDD), tRC = tRC(IDD), tRAS = tRASmin(IDD); CKE is HIGH HIGH between ...

Page 16

... IDD3N 800 IDD4W 1,240 IDD4R 1,480 IDD5B 1,240 IDD6 128 IDD7 2,200 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. F7(800@CL=6) E6(667@CL=5) 680 600 760 720 64 64 280 280 320 320 240 ...

Page 17

... IDD3P-S 108 IDD3N 540 IDD4W 1,035 IDD4R 1,305 IDD5B 1,035 IDD6 72 IDD7 1,935 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. F7(800@CL=6) E6(667@CL=5) 380 360 460 440 32 32 140 140 160 160 120 ...

Page 18

... UDIMM 12.5 M391T2953EZ3 : 1GB(64Mx8 *18) ECC Module Symbol E7(800@CL=5) IDD0 1,125 IDD1 1,215 IDD2P 144 IDD2Q 630 IDD2N 720 IDD3P-F 540 IDD3P-S 216 IDD3N 900 IDD4W 1,395 IDD4R 1,665 IDD5B 1,395 IDD6 144 IDD7 2,475 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. ...

Page 19

... DDR2 SDRAM (V =1.8V, V =1.8V, TA=25 DD DDQ Min Max Min Max M378T2953EZ3 M378T3354EZ3 - 5.5 M391T2953EZ3 - 512Mb 1Gb 2Gb 4Gb 105 127.5 195 327.5 7.8 7.8 7.8 7.8 3.9 3.9 3.9 3.9 DDR2-533(D5) DDR2-400(CC min max min max 3. 3. ...

Page 20

UDIMM 14.3 Timing parameters by speed grade (DDR2-800 and DDR2-667) (Refer to notes for informations related to this table at the component datasheet) Parameter DQ output access time from CK/CK DQS output access time from CK/CK Average clock HIGH pulse ...

Page 21

UDIMM Parameter Four Activate Window for 1KB page size products Four Activate Window for 2KB page size products CAS to CAS command delay Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Internal ...

Page 22

UDIMM 14.4 Timing parameters by speed grade (DDR2-533 and DDR2-400) (Refer to notes for informations related to this table at the component datasheet) Parameter DQ output access time from CK/CK DQS output access time from CK/CK CK HIGH pulse width ...

Page 23

UDIMM Parameter Four Activate Window for 1KB page size products Four Activate Window for 2KB page size products CAS to CAS command delay Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Internal ...

Page 24

... UDIMM 15.0 Physical Dimensions : 15.1 64Mbx8 based 64Mx64 Module (1 Rank) - M378T6553EZS (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QE 133.35 131.35 128. 63.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail DDR2 SDRAM ...

Page 25

... UDIMM 15.2 64Mbx8 based 64Mx72 Module (1 Rank) - M391T6553EZ3 (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QE 133.35 131.35 128.95 ECC SPD (for x72 63.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail B ...

Page 26

... UDIMM 15.3 64Mbx8 based 128Mx64/x72 Module (2 Ranks) (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 64M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51083QE - M378T2953EZ3/M391T2953EZ3 133.35 131.35 128.95 N/A (for x64) SPD ECC (for x72 63.00 N/A (for x64) ECC (for x72) 4 ...

Page 27

... UDIMM 15.4 32Mbx16 based 32Mx64 Module (1 Rank) - M378T3354EZ3 (2) 2.50 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 32M x16 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T51163QE 133.35 131.35 128. 63.00 4.00 0.80±0.05 3.80 1.00 Detail DDR2 SDRAM Units : Millimeters SPD 30 ...

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