AT24C128SX-09DT Atmel, AT24C128SX-09DT Datasheet - Page 10

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AT24C128SX-09DT

Manufacturer Part Number
AT24C128SX-09DT
Description
Manufacturer
Atmel
Datasheet

Specifications of AT24C128SX-09DT

Lead Free Status / RoHS Status
Compliant
Figure 12. Random Read
Notes:
Figure 13. Sequential Read
10
1. * = DON’T CARE bit
2. † = DON’T CARE bit for the 128K
AT24C128SC/AT24C256SC
address and serially clocks out the data word. The microcontroller does not respond
with a zero but does generate a following stop condition (refer to Figure 12).
SEQUENTIAL READ: Sequential reads are initiated by either a current address read or
a random address read. After the microcontroller receives a data word, it responds with
an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to
increment the data word address and serially clock out sequential data words. When the
memory address limit is reached, the data word address will “roll over” and the sequen-
tial read will continue. The sequential read operation is terminated when the
microcontroller does not respond with a zero but does generate a following stop condi-
tion (refer to Figure 13).
P
0
1661B–SEEPR–04/04

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