CY7C1470V25-250BZC Cypress Semiconductor Corp, CY7C1470V25-250BZC Datasheet - Page 21

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CY7C1470V25-250BZC

Manufacturer Part Number
CY7C1470V25-250BZC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1470V25-250BZC

Density
72Mb
Access Time (max)
3ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
250MHz
Operating Supply Voltage (typ)
2.5V
Address Bus
21b
Package Type
FBGA
Operating Temp Range
0C to 70C
Number Of Ports
4
Supply Current
450mA
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
165
Word Size
36b
Number Of Words
2M
Lead Free Status / RoHS Status
Not Compliant
Document #: 38-05290 Rev. *I
Switching Waveforms
NOP, STALL and DESELECT Cycles
ZZ Mode Timing
Notes:
24. The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrated CEN being used to create a pause. A Write is not performed during this cycle.
25. Device must be deselected when entering ZZ mode. See cycle description table for all possible signal conditions to deselect the device.
26. I/Os are in High-Z when exiting ZZ sleep mode.
In-Out (DQ)
ADDRESS
ADV/LD
Data
BWx
CEN
CLK
WE
CE
ALL INPUTS
(except ZZ)
Outputs (Q)
WRITE
D(A1)
[25, 26]
I
1
A1
SUPPLY
CLK
ZZ
READ
Q(A2)
A2
2
(continued)
t
[21, 22, 24]
ZZI
STALL
t ZZ
I DDZZ
3
D(A1)
Q(A3)
READ
A3
4
Q(A2)
WRITE
D(A4)
DON’T CARE
A4
DON’T CARE
5
High-Z
STALL
6
Q(A3)
UNDEFINED
NOP
7
DESELECT or READ Only
t RZZI
Q(A5)
t ZZREC
D(A4)
READ
A5
8
CY7C1470V25
CY7C1472V25
CY7C1474V25
DESELECT
9
Page 21 of 28
CONTINUE
DESELECT
Q(A5)
10
t
CHZ
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