FW82801BA S L5WK Intel, FW82801BA S L5WK Datasheet - Page 17
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FW82801BA S L5WK
Manufacturer Part Number
FW82801BA S L5WK
Description
Manufacturer
Intel
Datasheet
1.FW82801BA_S_L5WK.pdf
(671 pages)
Specifications of FW82801BA S L5WK
Lead Free Status / RoHS Status
Not Compliant
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Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
9.2
9.3
9.1.26 COM_DEC—LPC I/F Communication Port Decode Ranges
9.1.27 LPCFDD_DEC—LPC I/F FDD and LPT Decode Ranges
9.1.28 FB_DEC_EN1—Flash BIOS Decode Enable 1 Register
9.1.29 GEN1_DEC—LPC I/F Generic Decode Range 1 Register
9.1.30 LPC_EN—LPC I/F Enables Register
9.1.31 FB_SEL1—Flash BIOS Select 1 Register
9.1.32 GEN2_DEC—LPC I/F Generic Decode Range 2 Register
9.1.33 FB_SEL2—Flash BIOS Select 2 Register
9.1.34 FB_DEC_EN2—Flash BIOS Decode Enable 2 Register
9.1.35 FUNC_DIS—Function Disable Register
DMA I/O Registers (LPC I/F—D31:F0) .............................................................................344
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.2.6
9.2.7
9.2.8
9.2.9
9.2.10 DMA_CLMSK—DMA Clear Mask Register
9.2.11 DMA_WRMSK—DMA Write All Mask Register
Timer I/O Registers (LPC I/F—D31:F0)............................................................................351
9.3.1
9.3.2
Register (LPC I/F—D31:F0).................................................................................335
Register (LPC I/F—D31:F0).................................................................................335
(LPC I/F—D31:F0) ...............................................................................................336
(LPC I/F—D31:F0) ...............................................................................................337
(LPC I/F—D31:F0) ...............................................................................................337
(LPC I/F—D31:F0) ...............................................................................................339
(LPC I/F—D31:F0) ...............................................................................................340
(LPC I/F—D31:F0) ...............................................................................................340
(LPC I/F—D31:F0) ...............................................................................................341
(LPC I/F—D31:F0) ...............................................................................................342
DMABASE_CA—DMA Base and Current Address Registers
(LPC I/F—D31:F0) ...............................................................................................345
DMABASE_CC—DMA Base and Current Count Registers
(LPC I/F—D31:F0) ...............................................................................................346
DMAMEM_LP—DMA Memory Low Page Registers
(LPC I/F—D31:F0) ...............................................................................................346
DMACMD—DMA Command Register
(LPC I/F—D31:F0) ...............................................................................................347
DMASTA—DMA Status Register
(LPC I/F—D31:F0) ...............................................................................................347
DMA_WRSMSK—DMA Write Single Mask Register
(LPC I/F—D31:F0) ...............................................................................................348
DMACH_MODE—DMA Channel Mode Register
(LPC I/F—D31:F0) ...............................................................................................349
DMA Clear Byte Pointer Register
(LPC I/F—D31:F0) ...............................................................................................349
DMA Master Clear Register
(LPC I/F—D31:F0) ...............................................................................................350
(LPC I/F—D31:F0) ...............................................................................................350
(LPC I/F—D31:F0) ...............................................................................................350
TCW—Timer Control Word Register
(LPC I/F—D31:F0) ...............................................................................................352
9.3.1.1
9.3.1.2
SBYTE_FMT—Interval Timer Status Byte Format Register
(LPC I/F—D31:F0) ...............................................................................................354
RDBK_CMD—Read Back Command
(LPC I/F—D31:F0) ...............................................................................353
LTCH_CMD—Counter Latch Command
(LPC I/F—D31:F0) ...............................................................................353
Contents
17
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