FW82801BA S L5WK Intel, FW82801BA S L5WK Datasheet - Page 342
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FW82801BA S L5WK
Manufacturer Part Number
FW82801BA S L5WK
Description
Manufacturer
Intel
Datasheet
1.FW82801BA_S_L5WK.pdf
(671 pages)
Specifications of FW82801BA S L5WK
Lead Free Status / RoHS Status
Not Compliant
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LPC Interface Bridge Registers (D31:F0)
9.1.35
342
FUNC_DIS—Function Disable Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
13:12
Bit
15
14
10
11
9
8
7
6
D29_F7_Disable — R/W. Software sets this bit to disable the USB EHCI controller function. BIOS
must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = USB EHCI controller is enabled
1 = USB EHCI controller is disabled
LPC Bridge Disable (D31F0D) — R/W. Software sets this to 1 to disable the LPC bridge.
0 = Enable
1 = Disable. When disabled, the following spaces will no longer be decoded by the LPC bridge:
NOTE: Memory cycles in the LPC BIOS range below 4 GB will still be decoded when this bit is set,
Reserved
D29_F3_Disable — R/W. Software sets this bit to disable the USB UHCI controller #4 function.
BIOS must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = USB UHCI controller #4 is enabled
1 = USB UHCI controller #4 is disabled
D29_F2_Disable — R/W. Software sets this bit to disable the USB UHCI controller #3 function.
BIOS must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = USB UHCI controller #3 is enabled
1 = USB UHCI controller #3 is disabled
D29_F1_Disable — R/W. Software sets this bit to disable the USB UHCI controller #2 function.
BIOS must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = USB UHCI controller #2 is enabled
1 = USB UHCI controller #2 is disabled
D29_F0_Disable — R/W. Software sets this bit to disable the USB UHCI controller #1
function.BIOS must not enable I/O or memory address space decode, interrupt generation, or any
other functionality of functions that are to be disabled
0 = USB UHCI controller #1 is enabled
1 = USB UHCI controller #1 is disabled
Reserved
D31_F6_Disable — R/W. Software sets this bit to disable the AC ’97 modem controller function.
BIOS must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = AC’97 Modem is enabled
1 = AC’97 Modem is disabled
•Device 31, Function 0 Configuration space
•Memory cycles below 16 MB (100000h)
•I/O cycles below 64 KB (100h)
•The Internal I/OxAPIC at FEC0_0000 to FECF_FFFF
but the aliases at the top of 1 MB (the E and F segment) no longer will be decoded.
F2h
00h
No
Intel
Description
Attribute:
Size:
Power Well:
.
.
.
.
.
®
82801EB ICH5 / 82801ER ICH5R Datasheet
.
R/W
16 bits
Core
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