ISP1583ET STEricsson, ISP1583ET Datasheet - Page 28

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ISP1583ET

Manufacturer Part Number
ISP1583ET
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1583ET

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NXP Semiconductors
ISP1583_7
Product data sheet
8.16.3 Bus-powered mode
Table 16.
In bus-powered mode (see
the 5 V-to-3.3 V voltage regulator. The input to the regulator is from V
USB cable, the ISP1583 goes through the power-on reset cycle. In this mode, OTG is
disabled.
Table 17.
Table 18.
ISP1583 operation
SRP is not applicable
SRP is possible
ISP1583 operation
Normal bus operation
Power is lost
ISP1583 operation
Clock will wake up:
Power is lost
Fig 16. Bus-powered mode
After a resume and
After a bus reset
1.65 V to 3.6 V
V
CC(I/O)
Operation truth table for OTG
Operation truth table for SoftConnect
Operation truth table for clock off during suspend
is powered by V
1.5 k
Rev. 07 — 22 September 2008
V
V
RPU
CC(3V3)
CC(I/O)
ISP1583
Figure
BUS
.
V
16), V
BUS
V
3.3 V
3.3 V
V
3.3 V
0 V
V
3.3 V
0 V
CC(3V3)
CC(3V3)
CC(3V3)
CC(3V3)
REGULATOR
5 V-to-3.3 V
VOLTAGE
and V
V
3.3 V
3.3 V
V
3.3 V
0 V
V
3.3 V
0 V
Power supply
Power supply
Power supply
CC(I/O)
CC(I/O)
CC(I/O)
Hi-Speed USB peripheral controller
CC(I/O)
RPU
(3.3 V)
3.3 V
3.3 V
RPU
(3.3 V)
3.3 V
0 V
RPU
(3.3 V)
3.3 V
0 V
are supplied by the output of
V
1 µF
BUS
V
5 V
0 V
V
5 V
0 V
V
5 V
0 V
BUS
BUS
BUS
BUS
© NXP B.V. 2008. All rights reserved.
. On plugging the
ISP1583
1 M
OTG register
not applicable
operational
Bit SOFTCT in
Mode register
enabled
not applicable
Clock off
during suspend
enabled
not applicable
USB
004aaa463
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