HS1-82C55ARH-8 Intersil, HS1-82C55ARH-8 Datasheet - Page 13

• Manufacturer Part Number: HS1-82C55ARH-8
• Manufacturer: Intersil

Specifications of HS1-82C55ARH-8

• Operating Temperature (max): 125C
• Mounting: Through Hole
• Lead Free Status / RoHS Status: Compliant

Output Control Signal Definition
OBF (Output Buffer Full F/F)
The OBF output will go “low” to indicate that the CPU has
written data out to the specified port. This does not mean
valid data is sent out of the port at this time since OBF can
go true before data is available. Data is guaranteed valid at
the rising edge of OBF. See Note 1. The OBF F/F will be set
by the rising edge of the WR input and reset by ACK input
being low.
ACK (Acknowledge Input)
A “low” on this input informs the HS-82C55ARH that the data
from Port A or Port B is ready to be accepted. In essence, a
response from the peripheral device indicating that it is
ready to accept data. See Note 14.
INTR (Interrupt Request)
A “high” on this output can be used to interrupt the CPU
when an output device has accepted data transmitted by the
CPU. INTR is set by the rising edge of ACK and reset by the
falling edge of WR.
INPUT FROM
PERIPHERAL
WR
D7 D6 D5 D4 D3 D2 D1 D0
PC4, 5
1 = INPUT
0 = OUTPUT
1
0
MODE 1 (PORT A)
CONTROL WORD
INTR
INTE
STB
1
IBF
RD
A
PA7 - PA0
FIGURE 16. MODE 1 (STROBED INPUT)
0 1/0
PC4, 5
TSLIH
PC7
PC6
PC3
FIGURE 17. MODE 1 OUTPUT
2
8
TSHNH
TPVSH
TSLSH
I/O
OBF
A
ACK
A
INTR
A
13
WR
D7 D6 D5 D4 D3 D2 D1 D0
1
TRLNL
MODE 1 (PORT B)
TSHPX
CONTROL WORD
INTE
B
PB7 - PB0
PC1
PC2
PC0
TRHIL
1
8
0
HS-82C55ARH
OBF
B
ACK
B
INTR
B
INTE A
Controlled by Bit Set/Reset of PC6.
INTE B
Controlled by Bit Set/Reset of PC2.
NOTE:
14. To strobe data into the peripheral device, the user must operate
Combinations of Mode 1: Port A and Port B can be
individually defined as input or output in Mode 1 to support a
wide variety of strobed I/O applications.
RD
WR
OUTPUT
D7 D6 D5 D4 D3 D2 D1 D0
PC6, 7
1 = INPUT
0 = OUTPUT
PORT B (STROBED OUTPUT)
1
PORT A (STROBED INPUT)
INTR
the strobe line in a hand shaking mode. The user needs to send
OBF to the peripheral device, generate an ACK from the
peripheral device and then latch data into the peripheral device
on the rising edge of OBF.
OBF
ACK
0
WR
CONTROL WORD
PB7 - PB0
PA7 - PA0
1
PC6, 7
FIGURE 18. MODE 1 (STROBED OUTPUT)
FIGURE 19. COMBINATIONS OF MODE 1
1 1/0
PC4
PC5
PC3
PC1
PC2
PC0
TWLNL
TWHPV
2
8
1
8
0
STB A
IBF A
INTR A
I/O
OBF B
ACK B
INTR B
WR
RD
D7 D6 D5 D4 D3 D2 D1 D0
PC4, 5
1 = INPUT
0 = OUTPUT
PORT A (STROBED OUTPUT)
1
PORT B (STROBED INPUT)
TWHOL
0
CONTROL WORD
TKLKH
PB7 - PB0
PA7 - PA0
1
TKHOL
PC4, 5
0 1/0
PC7
PC6
PC3
PC2
PC1
PC0
TKHNH
2
8
1
8
1
OBF A
ACK A
INTR A
I/O
STB B
IBF B
INTR B