MC13892JVLR2 Freescale, MC13892JVLR2 Datasheet - Page 111

no-image

MC13892JVLR2

Manufacturer Part Number
MC13892JVLR2
Description
Manufacturer
Freescale
Datasheet

Specifications of MC13892JVLR2

Operating Temperature (max)
85C
Operating Temperature (min)
-30C
Mounting
Surface Mount
Package Type
BGA
Case Length
12mm
Screening Level
Commercial
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC13892JVLR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table 99. VUSB Input Source Control
When VBUSEN = 1 and VUSBIN = 1, SWBST will be driving the VBUS. In all other cases, the switch from VINUSB to UVBUS
will be open. The VUSBIN SPI bit is initialized by the PUMS2 pin configuration at cold start. When the PUMS2 is open the
VUSBIN SPI bit will default to 0, and when PUMS2 is grounded the VUSBIN SPI bit will default to 1. When PUMS2 is grounded,
the SWBST will also be enabled by default by setting the OTGSWBSTEN bit = 1. Note that (VBUSEN = 1 and VUSBIN = 1) only
closes the switch between VINUSB and UVBUS pins, but does not enable SWBST (this needs to be enabled by setting the SPI
bit OTGSWBSTEN = 1). In OTG mode, VUSB and VUSB2 will be automatically enabled by setting the SPI bit VUSBIN to a 1.
When SWBST is supplying the UVBUS pin (OTG Mode), it will generate VBUSVALID and BVALID interrupts. These interrupts
should not be interpreted as being powered by the host by the software, and the VUSB supply will continue to be supplied by the
SWBST output. To prevent the charger from charging in OTG mode, the charger should be put into software controlled mode by
setting the CHGAUTOB = 1, and the charge current set to 0 prior to enabling the SWBST to supply the UVBUS pin.
the switchover to supply the VUSB input by the USB cable (UVBUS pin) is a manual switchover, which will require the following
steps via software to switch over properly: receive BVALID interrupt, disable the VUSB regulator (VUSBEN = 0), change the input
VUSB to UVBUS instead of SWBST (set VINUSB = 0), and then enable the VUSB regulator (VUSBEN = 1). It will be up to the
processor to determine what type of device is connected, either a USB host or a wall charger, and take appropriate action.
detected during cold start then the VUSB regulator will be enabled and powered on in the sequence, shown in
System, and it will default, which is supplied by the UVBUS pin. If UVBUS is not detected at cold start then the VUSB will default
to off. If UVBUS is detected later, the VUSB regulator will be automatically be enabled and supplied from the UVBUS pin.
is initialized by at startup based on the PUMS2 configuration. With PUMS2 OPEN, the VUSBEN will default to a 1 on power up
and will reset to a 1, when either RESETB is valid or VBUS is invalid. This allows the VUSBEN regulator to be enabled
automatically if the VUSB regulator was disabled by software. With PUMS2 = GND the VUSBEN bit will be enabled in the power
up sequence shown in
be able to withstand the same high voltages as the charger. In over-voltage conditions, the VUSB regulator is disabled. The
following tables show the USB supplies.
should always be connected to BP even in cases where the regulators are not used by the application.
Analog Integrated Circuit Device Data
Freescale Semiconductor
Notes
74.
75.
VUSBIN
The VBUSEN pin along with the VUSBIN SPI bit shown in
The VUSB regulator defaults to on when PUMS2 = Ground, and is supplied by the SWBST output. If a USB host is attached,
When the PUMS2 = OPEN, the VUSB regulator will default to off, unless 5.0 V is present on the UVBUS pin. If UVBUS is
The VUSB regulator can be enabled independent of OTG or Host Mode by setting the VUSBEN SPI bit The VUSBEN SPI bit
Since UVBUS is shared with the charger input at the board level (see
VUSB2 is implemented with an integrated PMOS pass FET and has a dedicated supply pin VINUSB2. The pin VINUSB2
Parameter
Note that (VUSBIN = 1 and VBUSEN = 1) only closes the switch between the VINUSB and UVBUS pins, but does not enable the
SWBST boost switcher (which should be enabled with OTGSWBSTEN = 1).
VUSBIN SPI bit initialized by PUMS2 pin configuration at cold start
PUMS2 = Open, VUSBIN = 0
PUMS2 = Ground, VUSBIN = 1
Value
0
1
Power Control
Table 100. VUSB2 Voltage Control
VUSB2[1:0]
Powered by Host: UVBUS powers VUSB
OTG mode: SWBST internally switched to supply the VUSB regulator, and SWBST will drive VBUS from the
VUSBIN pin as long as VBUSEN pin is logic high = 1
Parameter
System.
Value
00
01
10
11
Table
output = 2.400 V
output = 2.600 V
output = 2.700 V
output = 2.775 V
Function
99, control switching SWBST to drive VBUS in OTG mode.
Function
Battery Interface and
ILoad max
50 mA
50 mA
50 mA
50 mA
FUNCTIONAL DEVICE OPERATION
Control), the UVBUS node must
Power Control
CONNECTIVITY
13892
111

Related parts for MC13892JVLR2