LH7A400N0F076B5 NXP Semiconductors, LH7A400N0F076B5 Datasheet - Page 48
LH7A400N0F076B5
Manufacturer Part Number
LH7A400N0F076B5
Description
Manufacturer
NXP Semiconductors
Datasheet
1.LH7A400N0F076B5.pdf
(65 pages)
Specifications of LH7A400N0F076B5
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LH7A400
Audio Codec Interface Waveforms
Transmit data is clocked on the rising edge of ACBIT-
CLK (whether transmitted by the LH7A400 ACI or by the
external codec chip); receive data is clocked on the fall-
ing edge. This allows full-speed, full duplex operation.
48
Figure 33 and Figure 34 show the timing for the ACI.
ACIN/ACOUT
ACBITCLK
ACSYNC
BIT
ACSYNC/ACOUT
(SoC Output)
ACBITCLK
LCDDCLK
LCDVD
Figure 35. CLCDC Valid Output Data Time
ACIN
7
ACIN/ACOUT
SAMPLED ON
FALLING EDGE
Figure 33. ACI Signal Timing
Figure 34. ACI Data stream
6
Rev. 01 — 16 July 2007
tOV
NXP Semiconductors
5
DATA VALID
4
tOS
Color LCD Controller Waveforms
LCD data. Timing diagrams for each CLCDC mode
appear in Figure 36 through Figure 41.
Figure 35 shows the Valid Output Setup Time for
3
2
tIS tIH
tOH
1
0
7
32-Bit System-on-Chip
Preliminary data sheet
6
LH7A400-169
LH7A400-181
LH7A400-211
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