MCIMX253CJM4A Freescale, MCIMX253CJM4A Datasheet - Page 52

• Manufacturer Part Number: MCIMX253CJM4A
• Manufacturer: Freescale

Specifications of MCIMX253CJM4A

• Lead Free Status / RoHS Status: Compliant

Timing parameters for UDMA out-bursts are listed in
3.7.3
The AUDMUX provides a programmable interconnect logic for voice, audio, and data routing between
internal serial interfaces (SSI and SAP) and external serial interfaces (audio and voice codecs). The AC
timing of AUDMUX external pins is governed by the SSI modules. For more information, see
Section 3.7.17, “Synchronous Serial Interface (SSI)
3.7.4
The CSI enables the chip to connect directly to external CMOS image sensors, which are classified as
dumb or smart as follows:
The following subsections describe the CSI timing in gated and ungated clock modes.
52
Parameter
•
•
t2cyc
ATA
tenv
tdvh
trfs1
tack
tdvs
tcyc
tcvh
tmli
tss
—
—
tli
tli
tli
Dumb sensors only support traditional sensor timing (vertical sync (VSYNC) and horizontal sync
(HSYNC)) and output-only Bayer and statistics data.
Smart sensors support CCIR656 video decoder formats and perform additional processing of the
image (for example, image compression, image pre-filtering, and various data output formats).
Digital Audio Mux (AUDMUX) Timing
CMOS Sensor Interface (CSI) Timing
Parameter
tdzfs_mli
Spec
tdzfs
tenv
tdvh
tack
tdvs
tcyc
tcvh
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 6
trfs
ton
toff
tss
tli1
tli2
tli3
—
tack(min.) = (time_ack
tenv(min.) = (time_env
tenv(max.) = (time_env
tdvs = (time_dvs
tdvs = (time_dvh
tcyc = time_cyc
t2cyc = time_cyc
trfs = 1.6
tdzfs = time_dzfs
tss = time_ss
tdzfs_mli =max.(time_dzfs, time_mli)
tli1 > 0
tli2 > 0
tli3 > 0
tcvh = (time_cvh
ton = time_on
toff = time_off
Table 38. Timing Parameters UDMA Out-Bursts
T + tsui + tco + tbuf + tbuf
T – (tskew1 + tskew2)
T – tskew1
T – tskew1
T – (tskew1 + tskew2)
T) – (tskew1 + tskew2)
T) – (tskew1 + tskew2)
T) – (tskew1 + tskew2)
2
T – (tskew1)
T
T) – (tskew1 + tskew2)
T) – (tskew1 + tskew2)
T) + (tskew1 + tskew2)
Timing.”
Value
Table
T – (tskew1 + tskew2)
38.
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time_dzfs
time_ack
time_env
time_dvs
time_dvh
time_cvh
time_cyc
time_cyc
time_ss
—
—
—
—
—
—