MCIMX253CJM4A Freescale, MCIMX253CJM4A Datasheet - Page 65

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MCIMX253CJM4A

Manufacturer Part Number
MCIMX253CJM4A
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX253CJM4A

Lead Free Status / RoHS Status
Compliant

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Table 48
slew rate of 2 V/ns.
Freescale Semiconductor
DDR4
DDR5
DDR6
DDR7
Slew Rate (V/Ns)
ID
Command/
Address
0.25
0.15
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
shows values for a command/address slew rate of 1 V/ns and an SDCLK, SDCLK_B differential
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 6
Table 49
CS, RAS, CAS, CKE, WE setup time
CS, RAS, CAS, CKE, WE hold time
Table 48. DDR2 SDRAM Timing Parameter Table (continued)
Table 49. tlS, tlH Derating Values for DDR2-400, DDR2-533
–1450
+187
+179
+167
+150
+125
–110
–175
–285
–350
–525
–800
+83
Address output setup time
–11
–25
–43
–67
Address output hold time
tlS
0
shows additional values for DDR2-400 and DDR2-533.
2.0 V/ns
Parameter
–1125
–125
–188
–292
–375
–500
–708
+94
+89
+83
+75
+45
+21
–14
–31
–54
–83
tlH
0
CK, CK Differential Slew Rate
–1420
+217
+209
+197
+180
+155
+113
–145
–255
–320
–495
–770
+30
+19
–13
–37
–80
+5
tlS
1.5 V/ns
–1095
+124
+119
+113
+105
–158
–262
–345
–470
–678
+75
+51
+30
+16
–24
–53
–95
–1
tlH
Symbol
t
t
t
t
IS
IH
IS
IH
–1390
+247
+239
+227
+210
+185
+143
–115
–225
–290
–465
–740
+60
+49
+35
+17
–50
–7
tlS
1.0 V/ns
0.475
0.475
Min.
0.35
0.35
DDR2-400
–1065
+154
+149
+143
+135
+105
–128
–232
–315
–440
–648
+46
+29
+81
+60
–23
–65
+6
tlH
Max.
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Unit
ns
ns
ns
ns
65

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