MCIMX31LVKN5C Freescale, MCIMX31LVKN5C Datasheet - Page 71
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MCIMX31LVKN5C
Manufacturer Part Number
MCIMX31LVKN5C
Description
Manufacturer
Freescale
Datasheet
1.MCIMX31LVKN5C.pdf
(122 pages)
Specifications of MCIMX31LVKN5C
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Display read operation can be performed with wait states when each read access takes up to four display
interface clock cycles according to the DISP0_RD_WAIT_ST parameter in the
DI_DISP0_TIME_CONF_3, DI_DISP1_TIME_CONF_3, DI_DISP2_TIME_CONF_3 Registers.
Figure 56
Freescale Semiconductor
DISPB_PAR_RS
DISPB_PAR_RS
DISPB_PAR_RS
DISPB_D#_CS
DISPB_WR
(READ/WRITE)
DISPB_D#_CS
DISPB_D#_CS
DISPB_WR
(READ/WRITE)
DISPB_WR
(READ/WRITE)
DISPB_BCLK
DISPB_DATA
DISPB_DATA
DISPB_DATA
DISPB_RD
(ENABLE)
DISPB_RD
(ENABLE)
DISPB_RD
(ENABLE)
Figure 55. Asynchronous Parallel System 68k Interface (Type 2) Burst Mode TIming Diagram
shows timing of the parallel interface with read wait states.
Single access mode (all control signals are not active for one display interface clock after each display access)
Burst access mode with sampling by separate burst clock (BCLK)
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
Burst access mode with sampling by ENABLE signal
Electrical Characteristics
71