LM9830VJD National Semiconductor, LM9830VJD Datasheet - Page 36
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
LM9830VJD
Manufacturer Part Number
LM9830VJD
Description
Manufacturer
National Semiconductor
Datasheet
1.LM9830VJD.pdf
(45 pages)
Specifications of LM9830VJD
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM9830VJD
Manufacturer:
NS/国半
Quantity:
20 000
Company:
Part Number:
LM9830VJD/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
An EPP read is shown in Figure 55. The handshaking for the
address cycle of a read is identical to the address cycle for a
write. The data cycle is as follows:
• The host takes STROBE high, indicating that the next operation
• The host tristates D0-D7
• The host takes AUTOFEED low to request the first nibble from
• The LM9830 places the first nibble on the ERROR, SELECT,
• The LM9830 takes BUSY high to indicate the nibble is valid.
• The host latches the nibble on or after the rising edge of BUSY.
• The host takes AUTOFEED high to request the second nibble
• The LM9830 places the second nibble on the ERROR,
• The LM9830 takes BUSY low to indicate the nibble is valid.
• The host latches the nibble on or after the falling edge of BUSY.
Additional nibble reads will read from the last latched address
(useful for reading pixel data or the DataPort).
7.0 The Microprocessor Compatible Interface
In this interface the part is written to like a standard µP peripheral,
with RD (AUTOFEED), WR (STROBE), CS (INIT), ALE (SELEC-
TIN), and an 8 bit databus (D0-D7). This interface would be used
in a system where another interface (perhaps SCSI or FireWire)
was desired. Using the LM9830 in this application in a DMA
mode is relatively easy and efficient, because large blocks of
image data can easily be read through a series of RDs.
To enter the µP interface mode, the CMODE pin should be tied to
V
7.1 Writing to the Configuration Register (µP Mode)
The Configuration Register address is latched on the falling edge
D
AUTOFEED
is a read.
the LM9830.
PE, and ACK pins.
from the LM9830.
SELECT, PE, and ACK pins.
SELECT IN
.
SELECT (D1, D5)
ERROR (D0, D4)
Figure 55: Reading from the Configuration Register
STROBE
D0 - D7
ACK (D3, D7)
BUSY
PE (D2, D6)
Addr
(Nibble Mode)
D7-D4
D3-D0
36
of ALE. Data is written to that address on the rising edge of WR.
7.2 Reading From The Configuration Register (µP Mode)
The address is latched as in the previous example. For all modes
except DataPort operations, the LM9830 transmits the data at
that address on the following read. Additional nibble reads will
read from the last latched address (useful for reading pixel data).
7.3 Writing Data to the DataPort (µP Mode)
The DataPort is used to write the gamma table and the off-
set/gain coefficients to the LM9830 in a continuous stream. First,
write to register 3 to set what the data is (gamma or offset/gain)
and what color (red, green, or blue) the data is for. Then write to
registers 4 and 5 to set the initial address (usually 0), and the
R/W mode (W in this example). To write data to the DataPort,
send the Data address (6) to the DataPort followed by a serial
stream of data as shown in Figure 58. The DataPort Address
stored in registers 4 and 5 will be automatically incremented after
every write (if writing gamma data) or every second write (if writ-
ing offset/gain coefficient words).
7.4 Reading Data from the DataPort (µP Mode)
The gamma table and offset/gain coefficients can also be read
(AUTOFEED)
(SELECTIN)
CS (INIT)
(STROBE)
Figure 58: Writing to the Configuration Register (µP)
(SELECTIN)
Figure 56: Writing to the Configuration Register (µP)
D0 - D7
Figure 57: Reading from the Configuration Register
RD (AUTO-
(SELECTIN)
RD (AUTO-
(STROBE)
CS (INIT)
(STROBE)
CS (INIT)
D0 - D7
D0 - D7
WR
ALE
FEED)
FEED)
RD
ALE
WR
WR
ALE
6
(µP mode, except DataPort)
Addr
Data
Addr
n
Data
8-Bit Data
8-Bit Data
n+1
http://www.national.com
Data
n+2
D