LM9830VJD National Semiconductor, LM9830VJD Datasheet - Page 7
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
LM9830VJD
Manufacturer Part Number
LM9830VJD
Description
Manufacturer
National Semiconductor
Datasheet
1.LM9830VJD.pdf
(45 pages)
Specifications of LM9830VJD
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM9830VJD
Manufacturer:
NS/国半
Quantity:
20 000
Company:
Part Number:
LM9830VJD/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
LM9830 can correct for using its internal PGA.
Note 13:
Note 14: Interaction with an actual parallel port load (C
For this reason, it is recommended that the parallel port be driven to 0x00h by the PC when not in the reverse transfer phase. When reading coefficient data from register 6
(register 3 = 00000XX1 binary), the EPP handshaking generated by the host PC may be faster than the data can settle. For this reason it is recommended that software
handshaking (“PS2” mode) be used when verifying coefficient data.
Gain
PGA
V
--- -
V
PGA Gain Error is the maximum difference between the measured gain for any PGA code and the ideal gain calculated by using the formula
=
G
0
+
X
PGA code
-------------------------- -
32
where
X
=
G
31
–
LOAD
G
0
32
----- -
31
> 200pF) can increase data settling time by as much as 100ns if the parallel port databus is precharged high.
.
V
RFT
V
REF
CCD Output Signal
7
V
WHITE
http://www.national.com