MCIMX353CJQ5C Freescale, MCIMX353CJQ5C Datasheet - Page 143

• Manufacturer Part Number: MCIMX353CJQ5C
• Manufacturer: Freescale

Specifications of MCIMX353CJQ5C

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
A
B
C
D
E
G
H
K
M
N
F
L
J
1
W ATA_
V
Y
_DAT
ATA3
See
GND
NFC
NFR
SRX
I2C2
RTS
FST
STX
FEC
_RD
D14
E_B
TX1
D5
D8
LE
D5
D4
DATA
1
2
ATA_
VSS
DA1
14
1
Table 92
NFAL
TX3_
NFW
ATA1
TXD
RX2
HCK
STX
STX
FEC
_RD
D10
D15
E_B
FS4
D0
D2
D7
D4
R
ATA_
INTR
ATA_
DATA
ATA_
DATA
2
E
2
13
11
Q
2
TX5_
_CLK
_RX_
ATA2
NFR
RXD
SCK
I2C2
ERR
D12
NF_
CE0
RX0
FEC
_RD
FEC
A13
D4
D6
A9
ATA_
DATA
ATA_
DATA
ATA_
DATA
R
B
3
2
for pins unavailable in the MCIMX351 SoC.
Table 93. Silicon Revision 2.0 Ball Map—17 x 17, 0.8 mm Pitch
10
3
9
7
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
_TDA
NFW
TX4_
_TX_
SCK
MA1
RX1
SRX
SCK
FEC
FEC
ERR
P_B
TX0
TA1
A7
A8
D1
D9
D5
DATA
DATA
DATA
ATA_
ATA_
ATA_
4
0
T
4
4
6
5
4
Table 94. Silicon Revision 2.1 Ball Map—17 x 17, 0.8 mm Pitch
_TDA
TX2_
HCK
SCK
D13
CTS
RX3
FSR
FEC
FEC
_CR
A11
TA2
DATA
DATA
DATA
D3
ATA_
ATA_
ATA_
A0
A5
A6
5
T
S
2
5
5
2
1
0
C_MI
_TDA
C_AT
SDB
SDB
NVC
NVC
NVC
VDD
NVC
C_N
C_N
STX
FEC
D11
A12
FS5
TA3
SC
ATA_
DMA
ATA_
ATA_
A0
A1
A3
A4
FC
FC
DIO
DIO
A
CK
6
2
W
R
6
SD30 SD27 SD24 SD23 SD21 SD18 SD15 SD14 SD10
SD31 SD28 SD26 SD22 SD20 SD19 SD12 SD13 SD11
C_MI
GND
VDD
NVC
C_E
NVC
C_N
VDD
NVC
VDD
VDD
A23
MI1
ATA_
OTG
_PW
ODE
SC
USB
T_M
FC
CS0
TES
A1
A2
7
7
1
2
3
R
7
SD29 SD25
C_MI
VDD
NVC
GND
GND
GND
NVC
GND
GND
CSPI
CSPI
C_E
A24
A25
MCL
MI1
EXT
_AR
1_S
CLK
1_S
SC
S0
8
7
8
K
SDQ
GND
GND
GND
GND
GND
CSPI
1_MI
CSPI
POW
VDD
NVC
C_E
NVC
C_E
FAIL
A22
1_M
ER_
MI1
MI1
OSI
S3
SO
9
7
9
SDQ
GND
GND
GND
GND
GND
GND
BOO
ODE
_MO
NVC
NVC
CLK
T_M
CLK
DE0
C_E
C_E
A20
A21
MI1
MI1
10
S2
10
O
0
SD17 SD16
POR
MGN
SDQ
NVC
NVC
GND
GND
GND
GND
O3_
O1_
C_E
C_E
FUS
GPI
GPI
A19
E_V
MI1
MI1
11
_B
S1
SS
11
0
1
D
_SIG
CAP
TUR
MLB
OG_
RST
GND
GND
GND
GND
PGN
GND
WD
SDC
VDD
NVC
C_E
A18
MI2
12
12
LK
E
D
7
_DAT
_DAT
SD2
MLB
MLB
LK_B
_CL
SDC
NVC
VDD
NVC
GND
GND
GND
GND
PVD
C_E
C_E
A0
A17
A16
13
MI2
MI2
K
13
D
6
_DAT
CSI_
HSY
SD2
_CL
SD2
1_UP
LD16 LD22 LD20 LD21 LD18 LD17 LD19
NC
SDQ
GND
CDC
CDC
CDC
CDC
A2
SD8
NVC
C_E
NVC
NVC
NVC
NVC
USB
PHY
14
A14
C_L
C_L
C_L
C_L
LLG
MI3
K
ND
14
S0
CSI_
CSI_
CSI_
PIXC
MCL
D13
D3_F
1_VD
1_UP
LLVD
SDW
PSHI
15
LK
VDD
VDD
PHY
USB
PHY
SD5
BCL
A15
A10
K
DA
FT
15
D
K
E
5
5
1
CSI_
CSI_
CSI_
D10
D15
D12
_PAD
DQM
LD12 LD14 LD11 LD13 LD15
1_VS
16
RAS
CON
TTM
PHY
(continued)
SD9
SD7
SD3
TRA
EB1
LD3
LD5
ST
SA
16
2
_DAT
CSI_
SD1
USB
PHY
2_D
A3
D9
17
_DAT
M
DQM
SD6
SD0
SDC
CAS
CLS
REV
I2C1
KE1
CS0
LD2
LD8
D3_
D3_
17
1
_DAT
USB
PHY
SD1
_CL
SD1
2_D
18
A2
D3_S
DQM
K
P
SDC
HSY
USB
PHY
1_UI
SD4
SD2
KE0
CS4
EB0
LD6
LD1
D3_
NC
PL
18
D
3
XTAL
_CM
_AU
DE_
SD1
DIO
19
D3_V
B
D
DQM
LD23
SD1
CS3
ECB
CS1
CS5
SYN
USB
PHY
LD4
LD9
1_D
19
M
C
0
DIO_
AUDI
OSC
VDD
_AU
EXT
VSS
AL_
20
O
LD10
_CLK
1_VD
GND
DRD
I2C1
PHY
CS2
LBA
LD0
LD7
D3_
RW
OE
DA
20
Y
W
V
Y
143
A
B
C
D
E
G
H
K
M
N
F
J
L