ATSAM3303 Atmel, ATSAM3303 Datasheet - Page 16

• Manufacturer Part Number: ATSAM3303
• Manufacturer: Atmel

Specifications of ATSAM3303

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / RoHS Status: Compliant

9.4
9.5
16
Serial Slave Synchronous Interface
Digital Audio
ATSAM3303
The ATSAM3303 can be controlled by an external host processor through the unidirectional
serial interface. However, no firmware can be downloaded at power-up through this interface.
Therefore an external ROM/Flash/EEPROM is required.
Pins used: SCLK, SYNC, SDIN (input), INT (output)
Data is shifted MSB first. The IC samples an incoming SDIN bit on the rising edge of SCLK,
therefore the host should change SDIN on the negative SCLK edge.
SYNC allows initial synchronization. The rising edge of SYNC, which should occur with SCLK
low, indicates that SDIN will hold MSB data on the next rising SCLK.
The data is stored internally in a 256-byte FIFO.
When the FIFO count is below 64, the INT output goes low. This allows the host processor to
send data in burst mode.
The maximum SCLK frequency is fck (fck being the crystal frequency).
The minimum time between two bytes is 64 fck periods.
The contents of the SDIN data are defined by the firmware.
Figure 9-4.
Pins used: CLBD (output), WSBD (output), DABD3 - 0 (outputs), DAAD3 - 0 (inputs)
Optionally: CLAD3 - 0 (inputs), WSAD3 - 0 (inputs)
The ATSAM3303 allows for 8 digital audio output channels and 8 digital audio input channels.
All audio channels are normally synchronized on single clocks CLBD, WSBD which are
derived from the IC crystal oscillator. However, as a firmware option, the DAAD3 - 0 inputs can
be synchronized with incoming CLAD3 - 0 and WSAD3 - 0 signals. In this case, the incoming
sampling frequencies must be lower or equal to the chip sampling frequency.
The digital audio timing follows the I2S standard, with up to 24 bits per sample
SCLK
SYNC
SDIN
Serial Slave Interface Typical Timing
MSB
6091C–DRMSD–21-Apr-06