MCIMX353DVM5B Freescale, MCIMX353DVM5B Datasheet - Page 15

MCIMX353DVM5B

Manufacturer Part Number
MCIMX353DVM5B
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX353DVM5B

Operating Temperature (min)
-20C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Quantity
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Part Number:
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Manufacturer:
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Quantity:
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4.2
Table 10
Freescale Semiconductor
Wait
Doze
Stop
Power
Mode
provides descriptions of the power modes of the i.MX35 processor.
VDD1,2,3,4 = 1.1 V (min.)
ARM is in wait for interrupt mode.
MAX is active.
L2 cache is kept powered.
MCU PLL is on (400 MHz)
PER PLL is off (can be configured)
(default: 300 MHz)
Module clocks are gated off (can be
configured by CGR register).
OSC 24M is ON.
OSC audio is off (can be configured).
RNGC internal osc is off.
VDD1,2,3,4 = 1.1 V (min.)
ARM is in wait for interrupt mode.
MAX is halted.
L2 cache is kept powered.
L2 cache control logic off.
AWB enabled.
MCU PLL is on(400 MHz)
PER PLL is off (can be configured).
(300 Mhz).
Module clocks are gated off (can be
configured by CGR register).
OSC 24M is ON.
OSC audio is off (can be configured)
RNGC internal osc is off
VDD1,2,3,4 = 1.1 V (min.)
ARM is in wait for interrupt mode.
MAX is halted
L2 cache is kept powered.
L2 cache control logic off.
AWB enabled.
MCU PLL is off.
PER PLL is off.
All clocks are gated off.
OSC 24 MHz is on
OSC audio is off
RNGC internal osc is off
Power Modes
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
Description
Table 10. i.MX35 Power Modes
12.4 mA
1.1
16
Typ.
QVCC (ARM/L2
mA
mA
Peripheral)
Max.
7.2 mA
400
7.2 mA
Typ.
MVDD/PVDD
µA
Max.
1.2 mA
1.2
1.2
OSC_AUDO_VDD
Typ.
OSC24M_VDD
mA
mA
Max.
15

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