AT94K05AL-25DQU Atmel, AT94K05AL-25DQU Datasheet - Page 159
AT94K05AL-25DQU
Manufacturer Part Number
AT94K05AL-25DQU
Description
Manufacturer
Atmel
Datasheet
1.AT94K05AL-25DQU.pdf
(204 pages)
Specifications of AT94K05AL-25DQU
Device System Gates
5000
Propagation Delay Time
12.1ns
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Industrial
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Compliant
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4.31.2
1138I–FPSLI–1/08
PortE
Table 4-34.
Note:
Figure 4-52. PortD Schematic Diagram
PortE is an 8-bit bi-directional I/O port with internal pull-up resistors.
Three I/O memory address locations are allocated for the PortE, one each for the Data Register
– PORTE, $07($27), Data Direction Register – DDRE, $06($26) and the PortE Input Pins –
PINE, $05($25). The PortE Input Pins address is read only, while the Data Register and the
Data Direction Register are read/write.
The PortE output buffers can sink 20 mA. As inputs, PortE pins that are externally pulled Low
will source current if the pull-up resistors are activated.
All PortE pins have alternate functions as shown in
DDDn
0
0
1
1
(1)
1. n: 7,6...0, pin number
PD*
PULLUP
MOS
DDDn
PORTDn
0
1
0
1
(1)
Bits on PortD Pins
(1)
Output
Output
Input
Input
I/O
RESET
DL
GTS
Pull-up
RP
DL
Yes
No
No
No
AT94KAL Series FPSLIC
Table
Comment
Tri-state (High-Z)
PDn will source current if
external pulled low (default)
Push-pull zero output
Push-pull one output
4-35.
GTS: Global Tri-State
DL: Configuration Download
WL: Write PORTD
WD: Write DDRD
RL: Read PORTD Latch
RD: Read DDRD
RP: Read PORTD Pin
Q
Q
PORTD*
RESET
RESET
DDD*
WD
WL
RD
RL
R
R
D
D
159
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