UPD8871CY Renesas Electronics America, UPD8871CY Datasheet - Page 13

• Manufacturer Part Number: UPD8871CY
• Manufacturer: Renesas Electronics America

Specifications of UPD8871CY

• Lead Free Status / RoHS Status: Supplier Unconfirmed

φ
φ
φ
(Line clamp mode)
1,
1L,
TG1 to
Remark Adjust cross points (
(Bit clamp mode)
φ
φ
φ
TG1 to
2 cross points
2 cross points
φ
φ
φ
1,
1,
TG3,
φ
φ
φ
φ
TG3
CLB
CLB
φ
φ
RB
φ
1L
1L
2
φ
1,
φ
Notes 1. Set the
Remark Inverse pulse of the
2 TIMING CHART
t7
t9, t10
t11
t12
t13, t14
t15, t16
t17, t18
t19
t20, t21
t22, t23
φ
φ
φ
φ
1L
2
1
2
Symbol
2. Stop the
3. Min. of t7 shows that the
φ
1,
φ
2) and (
90%
φ
90%
t22
90%
φ
10%
−5
RB pulse to high level during this period.
5000
Min.
RB pulse during this period.
900
200
t12
10
φ
Note 3
0
0
0
0
90%
1L,
t15
t9
Data Sheet S15329EJ3V0DS
10%
t7
t17
90%
t20
φ
2 V or more
t13
2) with input resistance of each pin.
φ
2 V or more
TG1 to
10000
1000
Typ.
400
350
t12
25
25
25
50
50
φ
RB and
Note 1
Note 2
t19
φ
t12
TG3 can be used as
φ
CLB overlap each other.
50000
50000
Max.
−
−
−
−
−
−
−
−
t14
t10
t18
t21
2 V or more
0.5 V or more
t16
t23
Unit
φ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLB.
90%
t11
µ
PD8871
11