MT9P031I12STM-ES Aptina LLC, MT9P031I12STM-ES Datasheet - Page 59

no-image

MT9P031I12STM-ES

Manufacturer Part Number
MT9P031I12STM-ES
Description
Manufacturer
Aptina LLC
Datasheet

Specifications of MT9P031I12STM-ES

Lead Free Status / RoHS Status
Supplier Unconfirmed
Appendix A – Power-On and Standby Timing
Figure 31:
PDF: 09005aef81a4a477/Source: 09005aef81a4a495
MT9P031_DS - Rev. E 7/10 EN
Power-On and Standby Timing Diagram
V
V
V
RESET_BAR
STANDBY_BAR
EXTCLK
SCLK, SDATA
Two-Wire Serial I/F
D
DATA OUTPUT
DD
AA
DD_
OUT
, V
, V
Notes:
PLL
[9:0]
DD_
AA_
PIX,
IO
MIN 10 SYSCLK cycles
MIN 1ms
1. Aptina recommends 1ms.
2. V
3. Aptina recommends that the chip is paused (RESTART_Pause register) prior to STANDBY_BAR = 0 or
Driven = 0
Power
restarted (Restart register) on resumption of operation.
up
AA
must stabilize before RESET_BAR goes HIGH.
Note 2
D
Active
OUT
non-Low-Power
[9:0]
Note 3
Standby
STANDBY_BAR = 0
Responds only to
Chip_Enable and
Invert Standby
registers when
59
High-Z
MIN 10 SYSCLK cycles
Low-Power
Standby
MT9P031: 1/2.5-Inch 5Mp Digital Image Sensor
Appendix A – Power-On and Standby Timing
Wake
up
Aptina reserves the right to change products or specifications without notice.
non-Low-Power
Note 3
D
OUT
MIN 10 SYSCLK cycles
Active
[9:0]
©2005 Aptina Imaging Corporation. All rights reserved.
Note 1
Power
down
Note 1

Related parts for MT9P031I12STM-ES