CYII5SC1300AB-QWC Cypress Semiconductor Corp, CYII5SC1300AB-QWC Datasheet - Page 28

• Manufacturer Part Number: CYII5SC1300AB-QWC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYII5SC1300AB-QWC

• Lead Free Status / RoHS Status: Not Compliant

Table 26. Pin List
Document #: 38-05710 Rev. *G
Pin
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
ADC_OUT<5>
ADC_OUT<4>
ADC_OUT<3>
ADC_OUT<2>
ADC_OUT<1>
ADC_OUT<0>
ADC_IN
ADC_CMD
ADC_VDDD
ADC_GNDA
ADC_GNDD
ADC_VDDA
ADC_VHIGH
VDDR_LEFT
VDDH
P_DATA<15>
P_DATA<14>
P_DATA<13>
P_DATA<12>
P_DATA<11>
P_DATA<10>
P_DATA<9>
Pin Name
[8, 9, 10]
(continued)
Output
Output
Output
Output
Output
Output
Input
Input
Ground
Ground
Input
Supply
Input
Supply
Supply
Supply
Input
Input
Input
Input
Input
Input
Pin Type
Digital output. ADC data output.
Digital output. ADC data output.
Digital output. ADC data output.
Digital output. ADC data output.
Digital output. ADC data output.
Digital output. ADC data output (LSB).
Analog input. ADC analog input.
Analog input. Biasing of the input stage of the ADC. Connect to ADC_VDDA with R = 50 kΩ
and decouple with C = 100 nF to ADC_GNDA.
Digital supply voltage. ADC digital supply voltage [3.3V].
Analog ground. ADC analog ground.
Digital ground. ADC digital ground.
Analog supply voltage. ADC analog supply voltage [3.3V].
Analog reference input. ADC high reference volt age.Default: Connect to VDDA with
R = 360Ω and decouple with C = 100 nF to GNDA.
Analog supply voltage. High reset level [4.5V].
Analog supply voltage. High supply voltage for HOLD switches in the image core [4.5V]
Digital input. Data parallel interface (MSB).
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Digital input. Data parallel interface.
Pin Description
CYII5SM1300AB
Page 28 of 34