UPD8861CY Renesas Electronics America, UPD8861CY Datasheet - Page 12

• Manufacturer Part Number: UPD8861CY
• Manufacturer: Renesas Electronics America

Specifications of UPD8861CY

• Lead Free Status / RoHS Status: Supplier Unconfirmed

TIMING CHART 4
10
(Line clamp mode)
(Bit clamp mode)
φ
TG1 to
φ
φ
φ
φ
TG3
CLB
CLB
φ
RB
φ
φ
1L
Notes 1. Set the
Remark Inverse pulse of the
1
2
2. Stop the
3. Min. of t7 shows that the
t7
t9, t10
t11
t12
t13, t14
t15, t16
t17, t18
t19
t20, t21
t22, t23
Symbol
φ
φ
RB and
RB pulse during this period.
90%
90%
90%
t22
10%
−5
3000
Min.
φ
900
200
t12
10
Note 3
0
0
0
0
φ
CLB (Bit clamp mode) to high level during this period.
90%
t9
TG1 to
Data Sheet S15167EJ4V0DS
t15
10%
t7
t17
90%
t20
φ
t13
RB and
φ
TG3 can be used as
10000
1000
Typ.
400
350
t12
50
50
50
50
5
φ
Note 1
Note 2
t19
CLB overlap each other.
t12
50000
50000
Max.
−
−
−
−
−
−
−
−
t14
φ
t10
t18
CLB.
t21
t16
t23
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
90%
t11
µ
PD8861