HD74ACT280RP HITACHI, HD74ACT280RP Datasheet

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HD74ACT280RP

Manufacturer Part Number
HD74ACT280RP
Description
Manufacturer
HITACHI
Datasheet

Specifications of HD74ACT280RP

Lead Free Status / RoHS Status
Not Compliant
HD74AC280FPEL
HD74AC280RPEL
HD74AC280
9-bit Parity Generator/Checker
Description
The HD74AC280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an
even or an odd number of these inputs is High. If an even number of inputs is High, the Sum Even output is High. If an
odd number is High, the Sum Even output is Low. The Sum Odd output is the complement of the Sum Even output.
Features
Notes: 1. Please consult the sales office for the above package availability.
Pin Arrangement
Rev.2.00, Jul.16.2004, page 1 of 7
Outputs Source/Sink 24 mA
Ordering Information
Part Name
2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of
the package code.
SOP-14 pin (JEITA)
SOP-14 pin (JEDEC) FP-14DNV
Package Type
GND
NC
I
I
I
O
E
6
7
8
FP-14DAV
1
2
3
4
5
6
7
Package Code Package Abbreviation Taping Abbreviation (Quantity)
(Top view)
RP
FP
14
11
10
13
12
8
9
V
I
I
I
I
I
I
5
4
3
2
1
0
CC
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
(Previous ADE-205-387 (Z))
REJ03D0266–0200Z
Jul.16.2004
Rev.2.00

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HD74ACT280RP Summary of contents

Page 1

HD74AC280 9-bit Parity Generator/Checker Description The HD74AC280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is High even number of inputs is ...

Page 2

HD74AC280 Logic Symbol Pin Names I – I Data Inputs 0 8 Odd Parity Output O Even Parity Output E Truth Table Number of High Inputs I – ...

Page 3

HD74AC280 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Absolute Maximum Ratings Item Supply voltage DC input diode current ...

Page 4

HD74AC280 Recommended Operating Conditions Item Supply voltage Input and output voltage Operating temperature Input rise and fall time (except Schmitt inputs) V 30 Characteristics Item Sym- Vcc bol (V) Input Voltage V 3.0 IH ...

Page 5

HD74AC280 Capacitance Item Input capacitance Power dissipation capacitance Rev.2.00, Jul.16.2004, page Symbol Typ Unit Condition ...

Page 6

HD74AC280 Package Dimensions 14 1 2.39 Max 2.54 ± 0. 2.39 Max 2.54 ± 0.25 *NI/Pd/AU Plating Rev.2.00, Jul.16.2004, page 19.20 20.32 Max 8 7 1.30 0.48 ± 0.10 Package Code JEDEC JEITA Mass (reference ...

Page 7

HD74AC280 10.5 Max 14 1 1.42 Max 1.27 *0.40 ± 0.06 *Ni/Pd/Au plating 14 1.27 *0.40 ± 0.06 *Ni/Pd/Au plating Rev.2.00, Jul.16.2004, page 10. 0.70 ± 0.20 0.15 0.12 M Package Code JEDEC JEITA Mass ...

Page 8

Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...

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