ICS87158AFT IDT, Integrated Device Technology Inc, ICS87158AFT Datasheet - Page 11

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ICS87158AFT

Manufacturer Part Number
ICS87158AFT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS87158AFT

Function
Clock Generator
Operating Temperature (max)
85C
Operating Temperature (min)
0C
Package Type
SSOP
Pin Count
48
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Power and Ground
This section provides a layout guide related to power,
ground and placement of bypass capacitors for a high-
speed digital IC. This layout guide is a general recommen-
dation. The actual board design will depend on the compo-
nent types being used, the board density and cost con-
straints. The description assumes that the board has clean
power and ground planes. The principle is to minimize the
ESR between the clean power/ground plane and the IC
power/ground pin.
A low ESR bypass capacitor should be used on each power
pin. The value of bypass capacitors ranges from 0.01uF to
0.1uF. The bypass capacitors should be located as close
87158AG
GND Pin
Power
Pin
C
F
IGURE
4. R
ECOMMENDED
IC
L
AYOUT OF
www.idt.com
11
to the power pin as possible. It is preferable to locate the
bypass capacitor on the same side as the IC. Figure 4
shows suggested capacitor placement. Placing the by-
pass capacitor on the same side as IC allows the capaci-
tor to have direct contact with the IC power pin. This can
avoid any vias between the bypass capacitor and the IC
power pins.
The vias should be place at the Power/Ground pads. There
should be minimum one via per pin. Increase the number
of vias from the Power/Ground pads to Power/Ground
planes can improve the conductivity.
B
YPASS
1-
TO
C
-6, LVPECL-
APACITOR
÷1, ÷2, ÷4 C
P
LACEMENT
POWER
Pads
GND
Pads
VIA
TO
-HCSL/LVCMOS
LOCK
ICS87158
G
REV. C JULY 25, 2010
ENERATOR

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