DS90CR483AVJD National Semiconductor, DS90CR483AVJD Datasheet - Page 11
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DS90CR483AVJD
Manufacturer Part Number
DS90CR483AVJD
Description
Manufacturer
National Semiconductor
Datasheet
1.DS90CR483AVJD.pdf
(24 pages)
Specifications of DS90CR483AVJD
Number Of Elements
8
Input Type
CMOS/TTL
Operating Supply Voltage (typ)
3.3V
Output Type
Serializer
Power Dissipation
2.3W
Operating Temp Range
-10C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Number Of Receivers
48
Number Of Drivers
8
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS90CR483AVJD/NOPB
Manufacturer:
NSC
Quantity:
106
Company:
Part Number:
DS90CR483AVJD/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
Company:
Part Number:
DS90CR483AVJDX/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
C — Setup and Hold Time (Internal data sampling window) defined by Rspos (receiver input strobe position) min and max
TPPOS — Transmitter output pulse position (min and max)
RSKM
■
■
■
■
C — Setup and Hold Time (Internal data sampling window) defined by Rspos (receiver input strobe position) min and max
RSKMD
■
■
■
See Applications Informations section for more details.
Cable Skew — typically 10 ps to 40 ps per foot, media dependent
TJCC — Cycle-to-cycle LVDS Output jitter (TJCC) is less than 100 ps (worse case estimate).
ISI is dependent on interconnect length; may be zero
See Applications Informations section for more details.
d = Tppos — Transmitter output pulse position (min and max)
f = TJCC — Cycle-to-cycle LVDS Output jitter (TJCC) is less than 100 ps (worse case estimate).
m = extra margin - assigned to ISI in long cable applications
≥
≥
Cable Skew (type, length) + LVDS Source Clock Jitter (cycle to cycle) + ISI (Inter-symbol interference)
TPPOSvariance (d) + TJCC (output jitter)(f) + ISI (m)
FIGURE 13. Receiver Skew Margin (RSKM) without DESKEW
FIGURE 14. Receiver Skew Margin (RSKMD)with DESKEW
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