MT46H64M16LFCK-5:A Micron Technology Inc, MT46H64M16LFCK-5:A Datasheet - Page 21
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MT46H64M16LFCK-5:A
Manufacturer Part Number
MT46H64M16LFCK-5:A
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H64M16LFCK-5A.pdf
(96 pages)
Specifications of MT46H64M16LFCK-5:A
Organization
64Mx16
Density
1Gb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
130mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT46H64M16LFCK-5:A TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Table 8: I
Notes 1–5 apply to all parameters/conditions in this table; V
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
Parameter/Condition
Operating 1 bank active precharge current:
=
HIGH between valid commands; Address inputs
are switching every 2 clock cycles; Data bus in-
puts are stable
Precharge power-down standby current: All banks idle; CKE is
LOW; CS is HIGH;
switching; Data bus inputs are stable
Precharge power-down standby current: Clock stopped; All banks
idle; CKE is LOW; CS is HIGH, CK = LOW, CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Precharge nonpower-down standby current: All banks idle; CKE =
HIGH; CS = HIGH;
switching; Data bus inputs are stable
Precharge nonpower-down standby current: Clock stopped; All
banks idle; CKE = HIGH; CS = HIGH; CK = LOW, CK# = HIGH; Ad-
dress and control inputs are switching; Data bus inputs are stable
Active power-down standby current: 1 bank active; CKE = LOW;
CS = HIGH;
ing; Data bus inputs are stable
Active power-down standby current: Clock stopped; 1 bank ac-
tive; CKE = LOW; CS = HIGH; CK = LOW; CK# = HIGH; Address and
control inputs are switching; Data bus inputs are stable
Active nonpower-down standby: 1 bank active; CKE = HIGH; CS =
HIGH;
Data bus inputs are stable
Active nonpower-down standby: Clock stopped; 1 bank active;
CKE = HIGH; CS = HIGH; CK = LOW; CK# = HIGH; Address and con-
trol inputs are switching; Data bus inputs are stable
Operating burst read: 1 bank active; BL = 4; CL = 3;
(MIN); Continuous READ bursts; Iout = 0mA; Address inputs are
switching every 2 clock cycles; 50% data changing each burst
Operating burst write: One bank active; BL = 4;
Continuous WRITE bursts; Address inputs are switching; 50% data
changing each burst
Auto refresh: Burst refresh; CKE = HIGH; Ad-
dress and control inputs are switching; Data bus
inputs are stable
Typical deep power-down current at 25°C: Address and control
pins are stable; Data bus inputs are stable
t
RC (MIN);
t
CK =
DD
t
CK =
t
t
CK =
CK (MIN); Address and control inputs are switching;
Specifications and Conditions (x32)
t
t
t
CK (MIN); Address and control inputs are switch-
CK =
t
CK =
CK (MIN); CKE is HIGH; CS is
t
t
CK (MIN); Address and control inputs are
CK (MIN); Address and control inputs are
t
RC
t
CK =
t
t
JEDEC-standard
RFC = 138ns
RFC =
Reduced page-
t
CK =
size option
t
CK (MIN);
option
t
t
REFI
CK
DD
21
/V
Electrical Specifications – I
DDQ
= 1.70–1.95V
Symbol
I
I
1Gb: x16, x32 Mobile LPDDR SDRAM
I
I
I
I
I
I
I
I
I
DD2NS
DD3NS
DD2PS
DD3PS
DD4W
I
DD2N
DD3N
I
DD5A
I
DD2P
DD3P
DD4R
Micron Technology, Inc. reserves the right to change products or specifications without notice.
DD0
DD5
DD8
110
150
150
140
80
18
14
20
16
15
-5
105
145
145
140
-54
75
17
13
19
15
15
Max
600
600
3.6
3.6
10
100
140
140
140
© 2007 Micron Technology, Inc. All rights reserved.
70
15
18
14
15
-6
8
DD
120
120
140
-75
70
60
12
16
12
14
8
Parameters
Unit Notes
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
10, 11
7, 13
7, 8
10
6
6
7
9
9
8
6
6
6
6