Z4S264C STEC, Z4S264C Datasheet - Page 37
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Z4S264C
Manufacturer Part Number
Z4S264C
Description
Manufacturer
STEC
Type
Solid State Driver
Datasheet
1.Z4S264C.pdf
(96 pages)
Specifications of Z4S264C
Density
64GByte
Operating Supply Voltage (typ)
5V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Package Type
Not Required
Mounting
Screw
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Programmable
Yes
Lead Free Status / RoHS Status
Not Compliant
Zeus 2.5-Inch Serial ATA Solid State Drive
SSD Control Block
The control block of the Zeus SSD is comprised of three integrated components:
FPGA Controller
The Field Programmable Gate Array (FPGA) Controller provides the interface between the SATA
drive and the host, and the IDE interface to the local flash memory installed in the drive. The
integrated DMA controller interfaces with the system memory to facilitate data transfer between the
host and local flash memory of the SSD.
RISC Microcontroller
An integrated microcontroller initiates and controls all activity within the Zeus ATA controller. The
microcontroller features more than 1 Mbit of on-chip SRAM and a wide range of peripheral functions,
with 8 Mbits of flash memory into a single 120-BGA package. The embedded microcontroller is a
high-performance processor with a high-density instruction set with very low power consumption. In
addition, a large number of internally banked registers provide very fast exception handling, making
it ideal for the real-time application control requirements of the SSD. The 8-level priority-vectored
interrupt controller, together with the Peripheral Data Controller, significantly enhance the real-time
performance of the SSD.
The flash memory controller architecture requires only minimal external component support. The
flash controller works with flash memory devices from Samsung
of compatible flash memory devices from other manufacturers.
Features of the flash memory controller include:
NAND SLC Flash Memory
The local subsystem uses Single-Level Cell (SLC) NAND, non-volatile flash memory that has only
two states and one bit of stored data. The SLC NAND flash control logic on the SSD is able to
conserve energy when managing the electrical charge during operation.
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FPGA Controller
RISC Microcontroller
NAND SLC Flash Memory
Built-in 3.3V voltage regulator for flash memory supply
Data transfer rates up to 55 MB/sec (controller to flash memory)
True-IDE mode support
Embedded ECC unit
Wear-leveling and bad-block mapping software
®
and Toshiba
®
, as well as a number
19