TEA5768HL/V2 STEricsson, TEA5768HL/V2 Datasheet - Page 42

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TEA5768HL/V2

Manufacturer Part Number
TEA5768HL/V2
Description
Manufacturer
STEricsson
Datasheet

Specifications of TEA5768HL/V2

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NXP Semiconductors
Table 22.
For minimum and maximum values: V
V
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] See user manual SAA7133HL for Anti-Alias Filter (AAF).
[11] Definition of levels and level setting:
[12] The analog audio inputs (pins LEFT1, RIGHT1, LEFT2 and RIGHT2) are supported by two input levels: 1 V (RMS) and 2 V (RMS),
[13] V
[14] Effective Input Modulation (EIM) means 75 s de-emphasis applied to audio input signals of the BTSC stereo encoder.
[15] The definition of the duty factor:
[16] The output timing must be measured with the load of a 30 pF capacitor to ground and a 500
[17] Signal V_CLK inverted; not delayed (default set-up).
SAA7133HL_2
Product data sheet
Symbol
t
TS capture inputs with serial transport streaming (TS-S); e.g. DVB applications
Clock input signal TS_CLK on pin GPIO20 (see
T
t
t
Data and control input signals on TS-S port (with respect to signal TS_CLK) on pins GPIO16, GPIO19, GPIO21 and GPIO22
(see
t
t
h(D)
r
f
su(D)
h(D)
DDD
cy
Input leakage currents include high-impedance output leakage for all bidirectional buffers with 3-state outputs.
Pins without pull-up resistors must have a 3 mA output current. Pins requiring pull-up resistors must have 6 mA; these are
pins FRAME#, TRDY#, IRDY#, DEVSEL#, SERR#, PERR#, INT_A and STOP#.
This parameter is to be interpreted as the cumulative edge rate across the specified range, rather than the instantaneous rate at any
point within the transition range.
REQ# and GNT# are point-to-point signals and have different output valid delay and input set-up times than bused signals. GNT# has a
set-up time of 10 ns. REQ# has a set-up time of 12 ns.
For purposes of active or float timing measurements, the high-impedance or ‘off’ state is defined to be when the total current delivered
through the device is less than or equal to the leakage current specification.
RST is asserted and de-asserted asynchronously with respect to CLK.
All output drivers floated asynchronously when RST is active.
V
Nominal analog video input signal is to be terminated by 75
into 18
from 3 dB (attenuation) to +6 dB (amplification) for the internal automatic gain control. See also the application note of the
SAA7133HL.
The full-scale level for analog audio signals V
Nominal audio input levels: external, mono, V
selectable independently per stereo input pair, LEFT1, RIGHT1 and LEFT2, RIGHT2.
diagram in SAA7133HL application notes ; unless otherwise specified.
Figure
15 dB (FS).
= 3.3 V; V
DD(I2C)
DDA
= 3.3 V; V
is the extended pull-up voltage of the I
Characteristics
15)
Parameter
data input hold time
cycle time
duty cycle
rise time
fall time
data input set-up
time
data input hold time
and 56 , and the dividing tap should feed the video input pin, via a coupling capacitor of 47 nF, to achieve a control range
DDA
i(SIF)
= 3.3 V; T
= 196 mV (RMS); level and gain settings according to
…continued
amb
= 25 C; unless otherwise specified.
Conditions
0.8 V to 2.0 V
2.0 V to 0.8 V
=
DDD
t
--------------- -
clk H
T
= 3.0 V to 3.6 V; V
cy
FS
i
= 180 mV (RMS); 15 dB (FS).
2
C-bus (3.3 V or 5 V bus).
= 0.8 V (RMS). The nominal level at the digital crossbar switch is defined at
Figure
Rev. 02 — 18 February 2008
15)
that results in 1 V (p-p) amplitude. This termination resistor should be split
DDA
= 3.0 V to 3.6 V; T
Table note
PCI audio and video broadcast decoder
[15]
11; for external components see the application
Min
8
37
40
-
-
3
8
amb
= 0 C to 70 C; for typical values:
resistor to 1.4 V.
Typ
-
-
-
-
-
-
-
SAA7133HL
Max
-
-
60
5
5
-
-
© NXP B.V. 2008. All rights reserved.
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Unit
ns
ns
%
ns
ns
ns
ns

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