MC9S12DP512CPVE Freescale, MC9S12DP512CPVE Datasheet - Page 54

• Manufacturer Part Number: MC9S12DP512CPVE
• Manufacturer: Freescale

Specifications of MC9S12DP512CPVE

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 14KB
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.25V
• Operating Supply Voltage (min): 2.35/4.5V
• On-chip Adc: 2(8-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Pin Name
Funct. 1
PK[5:0]
PJ[1:0]
PM7
PM6
PM5
PM4
PM3
PM2
PM1
PM0
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
PK7
PP7
PP6
PP5
PP4
PP3
PP2
PP1
PP0
MC9S12DP512 Device Guide V01.25
PJ7
PJ6
Pin Name
Funct. 2
KWJ[1:0]
RXCAN3
RXCAN2
RXCAN1
RXCAN0
TXCAN3
TXCAN2
TXCAN1
TXCAN0
XADDR
[19:14]
KWH7
KWH6
KWH5
KWH4
KWH3
KWH2
KWH1
KWH0
KWP7
KWP6
KWP5
KWP4
KWP3
KWP2
KWP1
KWP0
KWJ7
KWJ6
ECS
Pin Name
Funct. 3
ROMCTL
RXCAN4
RXCAN4
RXCAN0
RXCAN0
TXCAN4
TXCAN4
TXCAN0
TXCAN0
MOSI2
MISO2
MOSI1
MISO1
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
SCK2
SCK1
RXB
SS2
SS1
TXB
—
—
Pin Name
Funct. 4
RXCAN4
TXCAN4
MOSI2
MISO2
MOSI1
MISO1
SCK2
SCK1
SDA
SCL
SS2
SS1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Pin Name
Funct. 5
RXCAN0
TXCAN0
MOSI0
MISO0
SCK0
SS0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Supply
Power
VDDR
VDDX
VDDX
VDDX
VDDX
PUPKE
PERM/
PERH/
PUCR/
PERP/
CTRL
PPSH
PERJ/
PPSM
PPSP
PPSJ
Internal Pull
Resistor
Disabled
Disabled
Disabled
Reset
State
Up
Up
Port H I/O, Interrupt, SS of SPI2
Port H I/O, Interrupt, SCK of SPI2
Port H I/O, Interrupt, MOSI of SPI2
Port H I/O, Interrupt, MISO of SPI2
Port H I/O, Interrupt, SS of SPI1
Port H I/O, Interrupt, SCK of SPI1
Port H I/O, Interrupt, MOSI of SPI1
Port H I/O, Interrupt, MISO of SPI1
Port J I/O, Interrupt, TX of CAN4,
SCL of IIC, TX of CAN0
Port J I/O, Interrupt, RX of CAN4,
SDA of IIC, RX of CAN0
Port J I/O, Interrupts
Port K I/O, Emulation Chip Select,
ROM Control
Port K I/O, Extended Addresses
Port M I/O, TX of CAN3, TX of CAN4
Port M I/O, RX of CAN3, RX of CAN4
Port M I/O, TX of CAN2, CAN0,
CAN4, SCK of SPI0
Port M I/O, RX of CAN2, CAN0,
CAN4, MOSI of SPI0
Port M I/O, TX of CAN1, CAN0, SS
of SPI0
Port M I/O, RX of CAN1, CAN0,
MISO of SPI0
Port M I/O, TX of CAN0, RX of BDLC
Port M I/O, RX of CAN0, RX of BDLC
Port P I/O, Interrupt, Channel 7 of
PWM, SCK of SPI2
Port P I/O, Interrupt, Channel 6 of
PWM, SS of SPI2
Port P I/O, Interrupt, Channel 5 of
PWM, MOSI of SPI2
Port P I/O, Interrupt, Channel 4 of
PWM, MISO2 of SPI2
Port P I/O, Interrupt, Channel 3 of
PWM, SS of SPI1
Port P I/O, Interrupt, Channel 2 of
PWM, SCK of SPI1
Port P I/O, Interrupt, Channel 1 of
PWM, MOSI of SPI1
Port P I/O, Interrupt, Channel 0 of
PWM, MISO2 of SPI1
Description