PI6C48535-01LEX Pericom Semiconductor, PI6C48535-01LEX Datasheet - Page 2

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PI6C48535-01LEX

Manufacturer Part Number
PI6C48535-01LEX
Description
Clock Drivers & Distribution 2.5V 1:16 LVPECL Fanout Buffer
Manufacturer
Pericom Semiconductor
Type
Clock Driverr
Datasheets

Specifications of PI6C48535-01LEX

Number Of Clock Inputs
2
Output Logic Level
LVPECL
Mode Of Operation
Single-Ended
Output Frequency
500MHz
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
LVCMOS/LVTTL
Mounting
Surface Mount
Pin Count
20
Max Output Freq
500 MHz
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TSSOP-20
Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI6C48535-01LEX
Manufacturer:
PERICOM
Quantity:
20 000
Pin Description
Notes:
1. I = Input, O = Output, P = Power supply connection, I_PD = Input with pull down, I_PU = Input with pull up.
Pin Characteristics
Control Input Function Table
Notes:
1. After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as show below.
V
CLK_EN
CLK_SEL
CLK
CLK
NC
V
Q
Q
Q
Q
EE
CC
3
2
1
0
R_pulldown
CLK_EN
,
,
,
,
Name
R_pullup
n
n
n
n
Symbol
0
1
Q
Q
Q
Q
C
0
0
1
1
11-0040
3
2
1
0
IN
5, 7, 8, 9
10, 13,
11, 12
14, 15
16, 17
19, 20
Pin #
18
1
2
3
4
6
Input Pulldown Resistance
CLK_SEL
Input Pullup Resistance
Input Capacitance
0
1
0
1
Parameter
Inputs
Type
I_PU
I_PD
I_PD
I_PD
O
O
O
O
P
P
Connect to Negative power supply
Synchronizing clock enable. When high, clock outputs follow clock input. When low, Qx
outputs are forced low, nQx outputs are forced high. LVCMOS/LVTTL level with 50KΩ
pull up.
Clock select input. When high, selects CLK
LVCMOS/LVTTL level with 50KΩ pull down.
LVCMOS / LVTTL clock input
LVCMOS / LVTTL clock input
No internal connection.
Connect to 3.3V.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
Differential output pair, LVPECL interface level.
Selected Source
CLK
CLK
CLK
CLK
0
1
0
1
Conditions
2
LVTTL/LVCMOS to LVPECL Fanout Buffer
Diasbled: Low
Disabled: Low
Description
Min.
Enabled
Enabled
Q
0
:Q
1
input. When low, selects CLK
3
Typ.
Outputs
50
50
3.3V Low Skew 1-to-4
Diasbled: High
Disabled: High
Max.
4
n
Enabled
Enabled
Q
PI6C48535-01
0
:
0
n
PS8735A
input.
Q
3
Units
KΩ
pF
03/25/11

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