RC28F320J3D-75 NUMONYX, RC28F320J3D-75 Datasheet - Page 51
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RC28F320J3D-75
Manufacturer Part Number
RC28F320J3D-75
Description
INTEL
Manufacturer
NUMONYX
Datasheet
1.RC28F320J3D-75.pdf
(68 pages)
- Current page: 51 of 68
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Numonyx™ Embedded Flash Memory (J3 v. D)
Figure 23: Byte/Word Program Flowchart
November 2007
308551-05
FULL STATUS CHECK PROCEDURE
Program Complete
Check if Desired
Write Data and
Register Data
Read Status
Read Status
(See Above)
Write 40H,
Successful
Full Status
Byte/Word
Byte/Word
Program
Register
Address
Address
SR.7 =
SR.3 =
SR.1 =
SR.4 =
Start
0
0
0
1
1
1
1
0
Voltage Range Error
Device Protect Error
Programming Error
1. Toggling OE# (low to high to low) updates the status register. This
can be done in place of issuing the Read Status Register command.
Repeat for subsequent programming operations.
SR full status check can be done after each program operation, or
after a sequence of programming operations.
Write FFH after the last program operation to place device in read
array mode.
Toggling OE# (low to high to low) updates the status register. This can
be done in place of issuing the Read Status Register command.
Repeat for subsequent programming operations.
SR.4, SR.3 and SR.1 are only cleared by the Clear Status Register
command in cases where multiple locations are programmed before
full status is checked.
If an error is detected, clear the status register before attempting retry
or other error recovery.
Operation
Operation
(Note 1)
Standby
Standby
Standby
Standby
Write
Write
Read
Bus
Bus
Word Program
Setup Byte/
Command
Command
Byte/Word
Program
Data = 40H
Addr = Location to Be Programmed
Data = Data to Be Programmed
Addr = Location to Be Programmed
Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
Check SR.3
1 = Programming to Voltage Error
Check SR.1
1 = Device Protect Detect
Only required for systems
implemeting lock-bit configuration.
Check SR.4
1 = Programming Error
Detect
RP# = V
IH
Comments
Comments
, Block Lock-Bit Is Set
Datasheet
51
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