ADN2819ACP-CML Analog Devices Inc, ADN2819ACP-CML Datasheet - Page 5

IC RECOVER CLOCK/DATA 48-LFCSP

ADN2819ACP-CML

Manufacturer Part Number
ADN2819ACP-CML
Description
IC RECOVER CLOCK/DATA 48-LFCSP
Manufacturer
Analog Devices Inc
Type
Clock and Data Recovery (CDR)r
Datasheet

Specifications of ADN2819ACP-CML

Rohs Status
RoHS non-compliant
Output
CML
Frequency - Max
2.7GHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Frequency-max
2.7GHz
Input
-
Parameter
REFCLK DC INPUT CHARACTERISTICS
TEST DATA DC INPUT CHARACTERISTICS
LVTTL DC INPUT CHARACTERISTICS
LVTTL DC OUTPUT CHARACTERISTICS
1
2
3
4
5
PIN and NIN should be differentially driven, ac-coupled for optimum sensitivity.
PWD measurement made on quantizer outputs in bypass mode.
Jitter tolerance measurements are equipment limited.
TDINP/N are CML inputs. If the drivers to the TDINP/N inputs are anything other than CML, they must be ac-coupled.
SEL0 and SEL1 have internal pull-down resistors, causing higher I
Setup Time
Hold Time
Input Voltage Range
Peak-to-Peak Differential Input
Common-Mode Level
Peak-to-Peak Differential Input Voltage
Input High Voltage
Input Low Voltage
Input Current
Input Current (SEL0 and SEL1 Only)
Output High Voltage
Output Low Voltage
5
4
(TDINP/N)
IH
.
Conditions
T
OC-48
GbE
OC-12
OC-3
T
OC-48
GbE
OC-12
OC-3
@ REFCLKP or REFCLKN
DC-coupled, single-ended
CML inputs
V
V
V
V
V
V
S
H
IH
IL
IN
IN
OH
OL
Rev. B | Page 5 of 24
(See Figure 3)
(See Figure 3)
, I
= 0.4 V or V
= 0.4 V or V
, I
OL
OH
= +2.0 mA
= –2.0 mA
IN
IN
= 2.4 V
= 2.4 V
Min
140
350
750
3145
150
350
750
3150
0
100
2.0
–5
–5
2.4
Typ
VCC/2
0.8
V
Max
VCC
0.8
+5
+50
0.4
ADN2819
Unit
ps
ps
ps
ps
ps
ps
ps
ps
V
mV
V
V
V
µA
µA
V
V

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