ICS932S401EGLF IDT, Integrated Device Technology Inc, ICS932S401EGLF Datasheet - Page 13

• Manufacturer Part Number: ICS932S401EGLF
• Description: IC TIMING CTRL HUB PROGR 56TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Timing Control Hubr

Specifications of ICS932S401EGLF

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Number Of Elements: 3
• Supply Current: 350mA
• Pll Input Freq (min): 14.31818MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Output Frequency Range: 33.33 to 400MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 56
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 932S401EGLF

0921G—08/24/09
SMBus Table: CPU and SRC Stop and Power Down Mode Drive Control Register
SMBus Table: Output and Spread Spectrum Control Register
SMBus Table: Device ID Register
SMBus Table: Vendor & Revision ID Register
Byte 5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 4
Byte 6
Byte 7
Integrated
Circuit
Systems, Inc.
PCI, SRC
45,46
45,46
45,46
36,37
39,40
42,43
36,37
39,40
42,43
SRC
36,37
39,40
42,43
54,55
SRC
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
Test Clock Mode Entry
SRC Stop Drive Mode
CPUCLK3 Stop Drive
CPUCLK2 Stop Drive
CPUCLK1 Stop Drive
CPUCLK0 Stop Drive
CPUCLK2 PD Drive
CPUCLK1 PD Drive
CPUCLK0 PD Drive
SRC PD Drive Mode
Test Mode Selection
CPUCLK3 PD Drive
REF Drive Strength
PCI_STOP Control
CPUCLK3 Stop En
CPUCLK2 Stop En
CPUCLK1 Stop En
CPUCLK0 Stop En
Name
Name
Name
Name
FS_C
FS_B
FS_A
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
Stop non-free running PC and SRC
Free-Running Control, Default: not
affected by CPU_STOP
Test Mode Selection
Control Function
Control Function
Control Function
Control Function
Drive Mode in Stop
Drive Mode in Stop
Drive Mode in Stop
Drive Mode in Stop
Drive Mode in PD
Drive Mode in PD
Drive mode in PD
Drive mode in PD
FS_A readback
FS_C readback
FS_B readback
Driven in STOP
REVISION ID
VENDOR ID
Driven in PD
Test Mode
1X or 2X
13
clocks.
RESERVED
RESERVED
RESERVED
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
R
R
R
Free-Running
Free-Running
Free-Running
Free-Running
See 932S401 Functionality
Disable
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Hi-Z
Stop
1X
0
0
0
0
-
-
-
-
-
-
-
-
Table
ICS932S401
Stoppable
Stoppable
Stoppable
Stoppable
REF/N
Enable
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Run
2X
1
1
1
1
-
-
-
-
-
-
-
-
Latch
Latch
Latch
PWD
PWD
PWD
PWD
X
X
X
X
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1