ICS9EPRS475CGLFT IDT, Integrated Device Technology Inc, ICS9EPRS475CGLFT Datasheet - Page 10

• Manufacturer Part Number: ICS9EPRS475CGLFT
• Description: IC EMBEDDED PC MAIN CLK 56TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of ICS9EPRS475CGLFT

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IDT
Byte
Byte
Byte
Byte
Byte
9EPRS475
System Clock for Embedded AMD
®
System Clock for Embedded AMD
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
10
11
12
13
14
SMBus Table: Reserved
SMBus Table: Byte Count Register
SMBus Table: M/N Programming Enable and I/O Vout Control Register
SMBus Table: Reserved Register
SMBus Table: Reserved Register
SB_SRCDiv3
SB_SRCDiv2
SB_SRCDiv1
SB_SRCDiv0
SKIP_N_INC
CPU M/N En
SRC M/N En
CPU NDiv0
IO_VOUT2
IO_VOUT1
IO_VOUT0
Name
Name
Name
Name
Name
BC5
BC4
BC3
BC2
BC1
BC0
TM
based Systems
TM
Skip N Incrementing during CPU PLL
SB_SRC Divider Ratio Programming
based Systems
IO Output Voltage Select (Least
IO Output Voltage Select (Most
LSB N Divider Programming
CPU PLL M/N Prog. Enable
IO Output Voltage Select
Byte Count bit 5 (MSB)
Byte Count bit 0 (LSB)
SRC M/N Prog.Enable
Control Function
Control Function
Control Function
Control Function
Control Function
Bits from CPU PLL
M/N Programming
Byte Count bit 4
Byte Count bit 3
Byte Count bit 2
Byte Count bit 1
Significant Bit)
Significant Bit)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
10
Type
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Determines the number of bytes that are read
Byte 27 has the N Divider LSB (bit 0) for CPU
M/N Prog. Disabled
M/N Prog. Disabled
0010:/5 ; 0110:/10
0011:/9 ; 0111:/18
0000:/2 ; 0100:/4
0001:/3 ; 0101:/6
back from the device. Default is 0F hex.
N-Increment
See Table 5: V_IO Selection
0
0
0
0
0
(Default is 0.8V)
Bypass N-Increment
1001:/12 ; 1101:/24
1010:/20 ; 1110:/40
1011:/36 ; 1111:/72
M/N Prog. Enabled
M/N Prog. Enabled
1000:/8 ; 1100:/16
1
1
1
1
1
Default
Default
Default
Default
Default
1615B—04/26/10
X
X
X
X
X
1
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0