ICS83026AMILF IDT, Integrated Device Technology Inc, ICS83026AMILF Datasheet - Page 8

• Manufacturer Part Number: ICS83026AMILF
• Description: IC FANOUT BUFFER 1:2 DIFF 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS83026AMILF

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/No
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVCMOS, LVTTL
• Frequency - Max: 350MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 350MHz
• Number Of Outputs: 2
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Propagation Delay Time: 2.5ns
• Operating Supply Voltage (min): 3V
• Mounting: Surface Mount
• Pin Count: 8
• Operating Supply Voltage (typ): 3.3V
• Package Type: SOIC N
• Duty Cycle: 60%
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1103; 800-1103-5; 800-1103; 83026AMILF

Differential Clock Input Interface
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and
other differential signals. Both signals must meet the V
input requirements. Figures 2A to 2F show interface examples for the
HiPerClockS CLK/nCLK input driven by the most common driver
types. The input interfaces suggested here are examples only.
Figure 2A. HiPerClockS CLK/nCLK Input
Figure 2C. HiPerClockS CLK/nCLK Input
Figure 2E. HiPerClockS CLK/nCLK Input
ICS83026I Data Sheet
ICS83026AMI REVISION C AUGUST 26, 2009
2.5V
1.8V
3.3V
HCSL
LVPECL
*Optional – R3 and R4 can be 0
LVHSTL
IDT
HiPerClockS
LVHSTL Driver
Driven by an IDT Open Emitter
HiPerClockS LVHSTL Driver
Driven by a 3.3V LVPECL Driver
Driven by a 3.3V HCSL Driver
*R3
*R4
Zo = 50
Zo = 50
Zo = 50
Zo = 50
33
33
Zo = 50
Zo = 50
R3
125
R1
50
3.3V
R1
84
R1
50
R2
50
R4
125
R2
84
R2
50
CLK
nCLK
CLK
nCLK
CLK
nCLK
3.3V
3.3V
3.3V
HiPerClockS
Input
HiPerClockS
Input
HiPerClockS
Input
PP
and V
CMR
8
Please consult with the vendor of the driver component to confirm the
driver termination requirements. For example, in Figure 2A, the input
termination applies for IDT HiPerClockS open emitter LVHSTL
drivers. If you are using an LVHSTL driver from another vendor, use
their termination recommendation.
Figure 2B. HiPerClockS CLK/nCLK Input
Figure 2D. HiPerClockS CLK/nCLK Input
Figure 2F. HiPerClockS CLK/nCLK Input
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
2.5V
3.3V
3.3V
SSTL
LVDS
LVPECL
Driven by a 3.3V LVPECL Driver
Driven by a 3.3V LVDS Driver
Driven by a 2.5V SSTL Driver
Zo = 60
Zo = 60
Zo = 50
Zo = 50
Zo = 50
Zo = 50
©2009 Integrated Device Technology, Inc.
R3
120
2.5V
R1
120
R1
50
R2
50
R4
120
R2
120
R2
50
R1
100
CLK
nCLK
CLK
nCLK
CLK
nCLK
3.3V
3.3V
HiPerClockS
3.3V
HiPerClockS
Input
Receiver