ICS580M-01ILFT IDT, Integrated Device Technology Inc, ICS580M-01ILFT Datasheet - Page 4

• Manufacturer Part Number: ICS580M-01ILFT
• Description: IC CLK MUX ZERO DLAY BUFF 16SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Multiplexer , Zero Delay Bufferr

Specifications of ICS580M-01ILFT

• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Input: Clock
• Output: Clock
• Frequency - Max: 270MHz
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC
• Frequency-max: 270MHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Single-Ended
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 5.5V
• Package Type: SOIC N
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 580M-01ILFT

Device Operation
IDT™ / ICS™ GLITCH-FREE CLOCK MULITPLEXER
ICS580-01
GLITCH-FREE CLOCK MULITPLEXER
The ICS580-01 consists of a glitch free mux between INA and INB controlled by SELB. The device is designed to
switch between two clocks, whether running or not. In the first example, clocks are running on both INA and INB.
When SELB changes, the output clock goes low after three cycles of the output clock (nominally). The output then
stays low for three cycles of the new input clock (nominally) and then starts with the new input clock. This is shown
in Figure 1.
In the second example, one of the inputs was selected and running but has since stopped (either high or low). This
is indicated by either NO_INA or NO_INB going high depending on whether INA or INB has stopped. These signals
go high following a selectable time-out period after the clock has stopped. The timeout period is determined by the
DIV input in. The SELB pin is now changed to select the new input clock which is running. The output clock
immediately goes low and stays low for three cycles of the new input clock and then starts with the new input clock.
Figure 2 shows an example of this
Figure 2
Figure 1
NO_INA
CLK1, 2
CLK1, 2
SELB
SELB
INA
INB
INA
INB
Timeout
4
ICS580-01
CLOCK MULTIPLEXER
REV L 051310